"Systematic Design of a 3.5 GS/s 11-bit Time-Interleaved SAR ADC in 28 nm ..."

Shuai Liu et al. (2025)

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DOI: 10.1109/TCSI.2025.3559354

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type: Journal Article

metadata version: 2025-07-06

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Shuai Liu, Yechen Tian, Congyang Sun, Guoyu Li, Hao Xu, Na Yan:
Systematic Design of a 3.5 GS/s 11-bit Time-Interleaved SAR ADC in 28 nm CMOS Achieving 54 dB SNDR at Nyquist Frequency. IEEE Trans. Circuits Syst. II Express Briefs 72(6): 2483-2496 (2025)

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