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"A 79.2-μW 19.5-kHz-BW 94.8-dB-SNDR Fully Dynamic DT ΔΣ ADC ..."

Akira Matsuoka et al. (2023)

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DOI: 10.1109/TCSII.2023.3255866

access: open

type: Journal Article

metadata version: 2023-09-12

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Akira Matsuoka, Yo Kumano, Tomohiro Nezuka, Yoshikazu Furuta, Tetsuya Iizuka:
A 79.2-μW 19.5-kHz-BW 94.8-dB-SNDR Fully Dynamic DT ΔΣ ADC Using CLS-Assisted FIA With Sampling Noise Cancellation. IEEE Trans. Circuits Syst. II Express Briefs 70(8): 2759-2763 (2023)

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