"A hierarchical N-Queen decimation lattice and hardware architecture for ..."

Chung-Neng Wang et al. (2004)

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DOI: 10.1109/TCSVT.2004.825550

access: closed

type: Journal Article

metadata version: 2020-08-25

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Chung-Neng Wang, Shin-Wei Yang, Chi-Min Liu, Ti-Hao Chiang:
A hierarchical N-Queen decimation lattice and hardware architecture for motion estimation. IEEE Trans. Circuits Syst. Video Technol. 14(4): 429-440 (2004)

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