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"UTPlaceF 2.0: A High-Performance Clock-Aware FPGA Placement Engine."

Wuxi Li et al. (2018)

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DOI: 10.1145/3174849

access: closed

type: Journal Article

metadata version: 2018-11-21

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  - https://dblp.org/rec/journals/todaes/LiLLDP18
Wuxi Li, Yibo Lin, Meng Li, Shounak Dhar, David Z. Pan:
UTPlaceF 2.0: A High-Performance Clock-Aware FPGA Placement Engine. ACM Trans. Design Autom. Electr. Syst. 23(4): 42:1-42:23 (2018)

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