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"Intra-Masking Dual-Rail Memory on LUT Implementation for SCA-Resistant AES ..."

Anh-Tuan Hoang, Takeshi Fujino (2014)

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DOI: 10.1145/2617595

access: closed

type: Journal Article

metadata version: 2020-04-24

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Anh-Tuan Hoang, Takeshi Fujino:
Intra-Masking Dual-Rail Memory on LUT Implementation for SCA-Resistant AES on FPGA. ACM Trans. Reconfigurable Technol. Syst. 7(2): 10:1-10:19 (2014)

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