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"A 36-Gb/s 2× Half-Baud-Rate Adaptive Receiver in 28-nm CMOS."

Yi-Hao Lan, Shen-Iuan Liu (2024)

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DOI: 10.1109/TVLSI.2024.3392680

access: closed

type: Journal Article

metadata version: 2024-07-19

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Yi-Hao Lan, Shen-Iuan Liu:
A 36-Gb/s 2× Half-Baud-Rate Adaptive Receiver in 28-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 32(7): 1263-1272 (2024)

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