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"A High-Throughput VLSI Architecture Design of Arithmetic Encoder in JPEG2000."

Zhixiong Di et al. (2015)

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DOI: 10.1007/S11265-014-0945-5

access: closed

type: Journal Article

metadata version: 2020-03-12

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  dblp key:
  - journals/vlsisp/DiHSM15
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  - https://dblp.org/rec/journals/vlsisp/DiHSM15
Zhixiong Di, Yue Hao, Jiangyi Shi, Peijun Ma:
A High-Throughput VLSI Architecture Design of Arithmetic Encoder in JPEG2000. J. Signal Process. Syst. 81(2): 227-247 (2015)

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