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Publication search results
found 75 matches
- 2023
- Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Alfio Di Mauro, Luca Benini, Davide Rossi:
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2450-2463 (2023) - Enrico Tabanelli, Giuseppe Tagliavini, Luca Benini:
DNN Is Not All You Need: Parallelizing Non-neural ML Algorithms on Ultra-low-power IoT Processors. ACM Trans. Embed. Comput. Syst. 22(3): 56:1-56:33 (2023) - Jie Chen, Igor Loi, Eric Flamand, Giuseppe Tagliavini, Luca Benini, Davide Rossi:
Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters. IEEE Trans. Very Large Scale Integr. Syst. 31(4): 456-469 (2023) - Nazareno Bruschi, Giuseppe Tagliavini, Angelo Garofalo, Francesco Conti, Irem Boybat, Luca Benini, Davide Rossi:
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture. DATE 2023: 1-6 - Seyed Ahmad Mirsalari, Giuseppe Tagliavini, Davide Rossi, Luca Benini:
TransLib: A Library to Explore Transprecision Floating-Point Arithmetic on Multi-Core IoT End-Nodes. DATE 2023: 1-2 - Luca Valente, Yvan Tortorella, Mattia Sinigaglia, Giuseppe Tagliavini, Alessandro Capotondi, Luca Benini, Davide Rossi:
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC. DATE 2023: 1-6 - Francesco Barchi, Giacomo Pasini, Emanuele Parisi, Giuseppe Tagliavini, Andrea Bartolini, Andrea Acquaviva:
RUST-Encoded Stream Ciphers on a RISC-V Parallel Ultra-Low-Power Processor (Invited Paper). PARMA-DITAM 2023: 3:1-3:12 - Seyed Ahmad Mirsalari, Saba Yousefzadeh, Giuseppe Tagliavini, Dimitrios Stathis, Ahmed Hemani:
Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms. ICECS 2023: 1-8 - Andrea Amidei, Pierangelo Maria Rapa, Giuseppe Tagliavini, Roberto Rabbeni, Paolo Pavan, Simone Benatti:
ANGELS - Smart Steering Wheel for Driver Safety. IWASI 2023: 15-20 - Jie Chen, Igor Loi, Eric Flamand, Giuseppe Tagliavini, Luca Benini, Davide Rossi:
Scalable Hierarchical Instruction Cache for Ultra-Low-Power Processors Clusters. CoRR abs/2309.01299 (2023) - 2022
- Davide Rossi, Francesco Conti, Manuel Eggimann, Alfio Di Mauro, Giuseppe Tagliavini, Stefan Mach, Marco Guermandi, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini:
Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode. IEEE J. Solid State Circuits 57(1): 127-139 (2022) - Enrico Tabanelli, Giuseppe Tagliavini, Luca Benini:
Optimizing Random Forest-Based Inference on RISC-V MCUs at the Extreme Edge. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4516-4526 (2022) - Fabio Montagna, Stefan Mach, Simone Benatti, Angelo Garofalo, Gianmarco Ottavi, Luca Benini, Davide Rossi, Giuseppe Tagliavini:
A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics. IEEE Trans. Parallel Distributed Syst. 33(5): 1038-1053 (2022) - Nazareno Bruschi, Giuseppe Tagliavini, Francesco Conti, Sergi Abadal, Albert Cabellos-Aparicio, Eduard Alarcón, Geethan Karunaratne, Irem Boybat, Luca Benini, Davide Rossi:
Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference. AICAS 2022: 170-173 - Davide Nadalini, Manuele Rusci, Giuseppe Tagliavini, Leonardo Ravaglia, Luca Benini, Francesco Conti:
PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning. SAMOS 2022: 200-216 - Benedetta Mazzoni, Giuseppe Tagliavini, Luca Benini, Simone Benatti:
An Optimized Heart Rate Detection System Based on Low-Power Microcontroller Platforms for Biosignal Processing. SYSINT 2022: 160-170 - Nazareno Bruschi, Germain Haugou, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors. CoRR abs/2201.08166 (2022) - Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Alfio Di Mauro, Luca Benini, Davide Rossi:
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. CoRR abs/2201.08656 (2022) - Nazareno Bruschi, Giuseppe Tagliavini, Francesco Conti, Sergi Abadal, Albert Cabellos-Aparicio, Eduard Alarcón, Geethan Karunaratne, Irem Boybat, Luca Benini, Davide Rossi:
Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference. CoRR abs/2206.04796 (2022) - Nazareno Bruschi, Giuseppe Tagliavini, Angelo Garofalo, Francesco Conti, Irem Boybat, Luca Benini, Davide Rossi:
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture. CoRR abs/2211.12877 (2022) - Luca Valente, Yvan Tortorella, Mattia Sinigaglia, Giuseppe Tagliavini, Alessandro Capotondi, Luca Benini, Davide Rossi:
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC. CoRR abs/2211.14944 (2022) - 2021
- Benedetta Mazzoni, Simone Benatti, Luca Benini, Giuseppe Tagliavini:
Efficient Transform Algorithms for Parallel Ultra-Low-Power IoT End Nodes. IEEE Embed. Syst. Lett. 13(4): 210-213 (2021) - Alessio Burrello, Angelo Garofalo, Nazareno Bruschi, Giuseppe Tagliavini, Davide Rossi, Francesco Conti:
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs. IEEE Trans. Computers 70(8): 1253-1268 (2021) - Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes. IEEE Trans. Emerg. Top. Comput. 9(3): 1489-1505 (2021) - Florian Glaser, Giuseppe Tagliavini, Davide Rossi, Germain Haugou, Qiuting Huang, Luca Benini:
Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters. IEEE Trans. Parallel Distributed Syst. 32(3): 633-648 (2021) - Fabio Montagna, Giuseppe Tagliavini, Davide Rossi, Angelo Garofalo, Luca Benini:
Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-core MCUs. ARCS 2021: 167-182 - Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V based IoT End Nodes. ARITH 2021: 53 - Thorir Mar Ingolfsson, Andrea Cossettini, Xiaying Wang, Enrico Tabanelli, Giuseppe Tagliavini, Philippe Ryvlin, Luca Benini, Simone Benatti:
Towards Long-term Non-invasive Monitoring for Epilepsy via Wearable EEG Devices. BioCAS 2021: 1-4 - Emanuele Parisi, Francesco Barchi, Andrea Bartolini, Giuseppe Tagliavini, Andrea Acquaviva:
Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers. DATE 2021: 878-883 - Angelo Garofalo, Gianmarco Ottavi, Alfio Di Mauro, Francesco Conti, Giuseppe Tagliavini, Luca Benini, Davide Rossi:
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. ESSCIRC 2021: 267-270
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