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ORCIDDATE 2021: Grenoble, France
- Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021. IEEE 2021, ISBN 978-3-9819263-5-4
- Valentin Egloff, Jean-Philippe Noel, Maha Kooli, Bastien Giraud, Lorenzo Ciampolini, Roman Gauchi
, César Fuguet Tortolero, Eric Guthmuller, Mathieu Moreau, Jean-Michel Portal:
Storage Class Memory with Computing Row Buffer: A Design Space Exploration. 1-6 - José Flich, Rafael Tornero, David Rodriguez, Davide Russo, José Maria Martínez, Carles Hernández:
From a FPGA Prototyping Platform to a Computing Platform: The MANGO Experience. 7-12 - Christoph Hagleitner, Dionysios Diamantopoulos, Burkhard Ringlein, Constantinos Evangelinos, Charles R. Johns, Rong N. Chang, Bruce D'Amora, James A. Kahle, James C. Sexton, Michael Johnston, Edward Pyzer-Knapp, Chris Ward:
Heterogeneous Computing Systems for Complex Scientific Discovery Workflows. 13-18 - David Bol, Thibault Pirson, Rémi Dekimpe:
Moore's Law and ICT Innovation in the Anthropocene. 19-24 - Marc Duranton:
Few hints towards more sustainable Al. 25 - Kenshu Seto:
Scalar replacement in the presence of multiple write accesses for high-level synthesis. 26-31 - Chandan Karfa, T. M. Abdul Khader, Yom Nigam, Ramanuj Chouksey, Ramesh Karri:
HOST: HLS Obfuscations against SMT ATtack. 32-37 - Emanuele Vitali, Davide Gadioli, Fabrizio Ferrandi, Gianluca Palermo:
Parametric Throughput Oriented Large Integer Multipliers for High Level Synthesis. 38-41 - Zi Wang, Benjamin Carrión Schäfer:
Locking the Re-usability of Behavioral IPs: Discriminating the Search Space through Partial Encryptions. 42-45 - Qi Sun, Tinghuan Chen, Siting Liu, Jin Miao, Jianli Chen, Hao Yu, Bei Yu:
Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design. 46-51 - Hannah Badier, Christian Pilato, Jean-Christophe Le Lann, Philippe Coussy, Guy Gogniat:
Opportunistic IP Birthmarking using Side Effects of Code Transformations on High-Level Synthesis. 52-55 - Alejandro Hernández-Cane, Namiko Matsumoto, Eric Ping, Mohsen Imani:
OnlineHD: Robust, Efficient, and Single-Pass Online Learning Using Hyperdimensional System. 56-61 - Jung-Eun Kim, Richard M. Bradford, Max Del Giudice, Zhong Shao:
Adaptive Generative Modeling in Resource-Constrained Environments. 62-67 - Matthew Rowlings, Andy M. Tyrrell, Martin A. Trefzer:
Operating Beyond FPGA Tool Limitations: Nervous Systems for Embedded Runtime Management. 68-71 - Rumia Masburah, Rajib Lochan Jana, Ainuddin Khan, Shichao Xu, Shuyue Lan, Soumyajit Dey, Qi Zhu:
Adaptive Learning Based Building Load Prediction for Microgrid Economic Dispatch. 72-75 - Dimitra Nikitopoulou, Dimosthenis Masouros, Sotirios Xydis, Dimitrios Soudris:
Performance Analysis and Auto-tuning for SPARK in-memory analytics. 76-81 - Jiajia Jiao, Debjit Pal, Chenhui Deng, Zhiru Zhang:
GLAIVE: Graph Learning Assisted Instruction Vulnerability Estimation. 82-87 - Yan Li, Jun Han, Xiaoyang Zeng, Mehdi B. Tahoori:
TRIGON: A Single-phase-clocking Low Power Hardened Flip-Flop with Tolerance to Double-Node-Upset for Harsh Environments Applications. 88-93 - Jinting Ren, Xianzhang Chen, Duo Liu, Moming Duan, Renping Liu, Chengliang Wang:
Forseti: An Efficient Basic-block-level Sensitivity Analysis Framework Towards Multi-bit Faults. 94-97 - Sanmitra Banerjee, Mahdi Nikdast, Krishnendu Chakrabarty:
Modeling Silicon-Photonic Neural Networks under Uncertainties. 98-101 - Xuanyu Huang, Rui Zhang, Yu Huang, Peiyao Wang, Mei Li:
Enhancements of Model and Method in Lithography Hotspot Identification. 102-107 - Alessio Colucci, Dávid Juhász, Martin Mosbeck, Alberto Marchisio, Semeen Rehman, Manfred Kreutzer, Günther Nadbath, Axel Jantsch, Muhammad Shafique:
MLComp: A Methodology for Machine Learning-based Performance Estimation and Adaptive Selection of Pareto-Optimal Compiler Optimization Sequences. 108-113 - Antonio Cipolletta, Andrea Calimera:
Dataflow Restructuring for Active Memory Reduction in Deep Neural Networks. 114-119 - Wei Sun, Savvas Sioutas, Sander Stuijk, Andrew Nelson, Henk Corporaal:
Efficient Tensor Cores support in TVM for Low-Latency Deep learning. 120-123 - Yuge Chen, Zhongyuan Zhao, Jianfei Jiang, Guanghui He, Zhigang Mao, Weiguang Sheng:
Reducing Memory Access Conflicts with Loop Transformation and Data Reuse on Coarse-grained Reconfigurable Architecture. 124-129 - Boria Pérez, Alexander Fell, John D. Davis:
Coyote: An Open Source Simulation Tool to Enable RISC- V in HPC. 130-135 - Adrià Armejach, Bine Brank, Jordi Cortina, François Dolique, Timothy Hayes, Nam Ho, Pierre-Axel Lagadec, Romain Lemaire, Guillem López-Paradís, Laurent Marliac, Miquel Moretó, Pedro Marcuello, Dirk Pleiter, Xubin Tan, Said Derradji:
Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors. 136-141 - Gabriel H. Loh, Samuel Naffziger, Kevin Lepak:
Understanding Chiplets Today to Anticipate Future Integration Opportunities and Limits. 142-145 - Gauthaman Murali, Sung Kyu Lim:
Heterogeneous 3D ICs: Current Status and Future Directions for Physical Design Technologies. 146-151 - Sanmitra Banerjee, Arjun Chaudhuri, Shao-Chun Hung, Krishnendu Chakrabarty:
Advances in Testing and Design-for-Test Solutions for M3D Integrated Circuits. 152-157 - Biresh Kumar Joardar, Aqeeb Iqbal Arka, Janardhan Rao Doppa, Partha Pratim Pande:
3D++: Unlocking the Next Generation of High-Performance and Energy-Efficient Architectures using M3D Integration. 158-163 - Kamyar Mohajerani, Richard Haeussler, Rishub Nagpal, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Hardware Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process. 164-169 - Andrea Caforio, Fatih Balli, Subhadeep Banik, Francesco Regazzoni:
A Deeper Look at the Energy Consumption of Lightweight Block Ciphers. 170-175 - Anubhab Baksi, Jakub Breier, Yi Chen, Xiaoyang Dong:
Machine Learning Assisted Differential Distinguishers For Lightweight Ciphers. 176-181 - Xiaolu Hou, Jakub Breier, Shivam Bhasin:
DNFA: Differential No-Fault Analysis of Bit Permutation Based Ciphers Assisted by Side-Channel. 182-187 - Stefan Hillmich, Richard Kueng, Igor L. Markov, Robert Wille:
As Accurate as Needed, as Efficient as Possible: Approximations in DD-based Quantum Circuit Simulation. 188-193 - Thomas Grurl, Richard Kueng, Jürgen Fuß, Robert Wille:
Stochastic Quantum Circuit Simulation Using Decision Diagrams. 194-199 - Philipp Niemann, Chandan Bandyopadhyay, Rolf Drechsler:
Combining SWAPs and Remote Toffoli Gates in the Mapping to IBM QX Architectures. 200-205 - Raviv Gal, Eldad Haber, Wesam Ibraheem, Brian Irwin, Ziv Nevo, Avi Ziv:
Automatic Scalable System for the Coverage-Directed Generation (CDG) Problem. 206-211 - Tom Kolan, Hillel Mendelson, Vitali Sokhin, Shai Doron, Hernan Theiler, Shay Aviv, Hagai Hadad, Natalia Freidman, Elena Tsanko, John M. Ludden, Bryant Cockcroft:
Post Silicon Validation of the MMU. 212-217 - Sören Tempel, Vladimir Herdt, Rolf Drechsler:
An Effective Methodology for Integrating Concolic Testing with SystemC-based Virtual Prototypes. 218-221 - Stefano Aldegheri, Nicola Bombieri, Samuele Germiniani, Federico Moschin, Graziano Pravadelli:
A containerized ROS-compliant verification environment for robotic systems. 222-225 - Paulo C. Santos, Bruno E. Forlin, Luigi Carro:
Sim2PIM: A Fast Method for Simulating Host Independent & PIM Agnostic Designs. 226-231 - Sven Thijssen, Sumit Kumar Jha, Rickard Ewetz:
COMPACT: Flow-Based Computing on Nanoscale Crossbars with Minimal Semiperimeter. 232-237 - Jiaqi Gu, Chenghao Feng, Zheng Zhao, Zhoufeng Ying, Mingjie Liu, Ray T. Chen, David Z. Pan:
SqueezeLight: Towards Scalable Optical Neural Networks with Multi-Operand Ring Resonators. 238-243 - Yingxun Fu, Xun Liu, Jiwu Shu, Zhirong Shen, Shiye Zhang, Jun Wu, Li Ma:
Receptive-Field and Switch-Matrices Based ReRAM Accelerator with Low Digital-Analog Conversion for CNNs. 244-247 - Yiwen Geng, Bin Gao, Qingtian Zhang, Wenqiang Zhang, Peng Yao, Yue Xi, Yudeng Lin, Junren Chen, Jianshi Tang, Huaqiang Wu, He Qian:
An On-chip Layer-wise Training Method for RRAM based Computing-in-memory Chips. 248-251 - Sarah Azimi, Corrado De Sio, Luca Sterpone:
A 3-D LUT Design for Transient Error Detection Via Inter-Tier In-Silicon Radiation Sensor. 252-257 - Yue Tang, Nan Guan, Zhiwei Feng, Xu Jiang, Wang Yi:
Response Time Analysis of Lazy Round Robin. 258-263 - Behnaz Ranjbar, Ali Hoseinghorban, Siva Satyendra Sahoo, Alireza Ejlali, Akash Kumar:
Improving the Timing Behaviour of Mixed-Criticality Systems Using Chebyshev's Theorem. 264-269 - Waqar Ali, Rodolfo Pellizzoni, Heechul Yun:
Virtual Gang Scheduling of Parallel Real-Time Tasks. 270-275 - Dejan S. Milojicic, Paolo Faraboschi, Nicolas Dubé, Duncan Roweth:
Future of HPC: Diversifying Heterogeneity. 276-281 - Yijia Zhang, Daniel Curtis Wilson, Ioannis Ch. Paschalidis, Ayse K. Coskun:
A Data Center Demand Response Policy for Real-World Workload Scenarios in HPC. 282-287 - John Glassmire, Hamideh Bitaraf, Stylianos Papadakis, Alexandre Oudalov:
Accelerating data center decarbonization and maximizing renewable usage with grid edge solutions. 288-293 - Rémi Bouzel, Yanik Ngoko, Paul Benoit, Nicolas Sainthérant:
Distributed Grid computing Manager covering Waste Heat Reuse Constraints. 294-299 - Mikail Yayla, Kuan-Hsun Chen, Georgios Zervakis, Jörg Henkel, Jian-Jia Chen, Hussam Amrouch:
FeFET and NCFET for Future Neural Networks: Visions and Opportunities. 300-305 - Dayane Reis, Ann Franchesca Laguna, Michael T. Niemier, Xiaobo Sharon Hu:
Exploiting FeFETs via Cross-Layer Design from In-memory Computing Circuits to Meta-Learning Applications. 306-311 - Hsiang-Yun Cheng, Chun-Feng Wu, Christian Hakert, Kuan-Hsun Chen, Yuan-Hao Chang, Jian-Jia Chen, Chia-Lin Yang, Tei-Wei Kuo:
Future Computing Platform Design: A Cross-Layer Design Approach. 312-317 - Onur Mutlu:
Intelligent Architectures for Intelligent Computing Systems. 318-323 - Mahmoud Elfar, Tung-Che Liang, Krishnendu Chakrabarty, Miroslav Pajic:
Formal Synthesis of Adaptive Droplet Routing for MEDA Biochips. 324-329 - Minxuan Zhou, Muzhou Li, Mohsen Imani, Tajana Rosing:
HyGraph: Accelerating Graph Processing with Hybrid Memory-centric Computing. 330-335 - Sudip Poddar, Gerold Fink, Werner Haselmayr, Robert Wille:
Generic Sample Preparation for Different Microfluidic Platforms. 336-339 - Fan Chen, Linghao Song, Hai Helen Li, Yiran Chen:
RAISE: A Resistive Accelerator for Subject-Independent EEG Signal Classification. 340-343 - Oliver Keszöcze, Naser Mohammadzadeh, Robert Wille:
Exact Physical Design of Quantum Circuits for Ion-Trap-based Quantum Architectures. 344-349 - Fang-Chi Wu, Jian-De Li, Katherine Shu-Min Li, Sying-Jyan Wang, Tsung-Yi Ho:
Double DQN for Chip-Level Synthesis of Paper-Based Digital Microfluidic Biochips. 350-353 - Shubham Rai, Heinz Riener, Giovanni De Micheli, Akash Kumar:
Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies. 354-359 - Anna Bernasconi, Valentina Ciriani:
Autosymmetry of Incompletely Specified Functions. 360-365 - Alex Chan, Danil Sokolov, Victor Khomenko, David Lloyd, Alex Yakovlev:
Synthesis of SI Circuits from Burst-Mode Specifications. 366-369 - Adrian Wheeldon, Alex Yakovlev, Rishad A. Shafik, Jordan Morris:
Low-Latency Asynchronous Logic Design for Inference at the Edge. 370-373 - Weihua Xiao, Weikang Qian, Weiqiang Liu:
GOMIL: Global Optimization of Multiplier by Integer Linear Programming. 374-379 - Christoph Beyerstedt, Jonas Meier, Fabian Speicher, Ralf Wunderlich, Stefan Heinen:
An Event-Driven System-Level Noise Analysis Methodology for RF Systems. 380-385 - K. Gaurav Kumar, Baibhab Chatterjee, Shreyas Sen:
OpenSerDes: An Open Source Process-Portable All-Digital Serial Link. 386-391 - Wenhao Wang, Yukui Luo, Xiaolin Xu:
Constructive Use of Process Variations: Reconfigurable and High-Resolution Delay-Line. 392-395 - Thibault Vayssade, Florence Azaïs, Laurent Latorre, François Lefèvre:
Digital test of ZigBee transmitters: Validation in industrial test environment. 396-401 - Mengyuan Li, Xiaobo Sharon Hu:
A Quantization Framework for Neural Network Adaption at the Edge. 402-407 - Behnam Khaleghi, Hanyang Xu, Justin Morris, Tajana Simunic Rosing:
tiny-HD: Ultra-Efficient Hyperdimensional Computing Engine for IoT Applications. 408-413 - Zeinab Hakimi, Vijaykrishnan Narayanan:
Resolution-Aware Deep Multi-View Camera Systems. 414-417 - Xiangzhong Luo, Di Liu, Shuo Huai, Weichen Liu:
HSCoNAS: Hardware-Software Co-Design of Efficient DNNs via Neural Architecture Search. 418-421 - Ziyi Guan, Shuwei Li, Yuan Cheng, Changhai Man, Wei Mao, Ngai Wong, Hao Yu:
A Video-based Fall Detection Network by Spatio-temporal Joint-point Model on Edge Devices. 422-427 - Charles Steinmetz, Greyce N. Schroeder, Achim Rettberg, Ricardo Nagel Rodrigues, Carlos Eduardo Pereira:
Enabling and supporting car-as-a-service by digital twin modeling and deployment. 428-433 - Khaled Alamin, Sara Vinco, Massimo Poncino, Nicola Dall'Ora, Enrico Fraccaroli, Davide Quaglia:
Digital Twin Extension with Extra-Functional Properties. 434-439 - Mohammad Abdullah Al Faruque, Deepan Muthirayan, Shih-Yuan Yu, Pramod P. Khargonekar:
Cognitive Digital Twin for Manufacturing Systems. 440-445 - Thomas Markwirth, Roland Jancke, Christoph Sohrmann:
Dynamic fault injection into digital twins of safety-critical systems. 446-450 - Markus Gutmann, Bernhard Rinner:
Mission Specification and Execution of Multidrone Systems. 451-456 - Clara Hobbs, Debayan Roy, Parasara Sridhar Duggirala, F. Donelson Smith, Soheil Samii, James H. Anderson, Samarjit Chakraborty:
Perception Computing-Aware Controller Synthesis for Autonomous Systems. 457-462 - Kruttidipta Samal, Marilyn Wolf, Saibal Mukhopadhyay:
Closed-loop Approach to Perception in Autonomous System. 463-468 - Xinkai Zhang, Justin M. Bradley:
Computing for Control and Control for Computing. 469-474 - Sohan Lal, Jan Lucas, Ben H. H. Juurlink:
QSLC: Quantization-Based, Low-Error Selective Approximation for GPUs. 475-480 - Younghoon Kim, Swagath Venkataramani, Sanchari Sen, Anand Raghunathan:
Value Similarity Extensions for Approximate Computing in General-Purpose Processors. 481-486 - Ricardo Garcia, Fatemeh Asgarinejad, Behnam Khaleghi, Tajana Rosing, Mohsen Imani:
TruLook: A Framework for Configurable GPU Approximation. 487-490 - Isaías B. Felzmann, João Fabrício Filho, Lucas Francisco Wanner:
AxPIKE: Instruction-level Injection and Evaluation of Approximate Computing. 491-494 - Bo Liu, Zeyu Shen, Lepeng Huang, Yu Gong, Zilong Zhang, Hao Cai:
A 1D-CRNN Inspired Reconfigurable Processor for Noise-robust Low-power Keywords Recognition. 495-500 - Haiyang Pan, Yuhang Liu, Tianyue Lu, Mingyu Chen:
LSP: Collective Cross-Page Prefetching for NVM. 501-506 - Yifu Deng, Jianhui Yue, Zhiyuan Lu, Yifeng Zhu:
Efficient Hardware-assisted Out-place Update for Persistent Memory. 507-512 - Zejian Liu, Gang Li, Jian Cheng:
Hardware Acceleration of Fully Quantized BERT for Efficient Natural Language Processing. 513-516 - Seyed Saber Nabavi Larimi, Behzad Salami, Osman S. Unsal, Adrián Cristal Kestelman, Hamid Sarbazi-Azad, Onur Mutlu:
Understanding Power Consumption and Reliability of High-Bandwidth Memory with Voltage Underscaling. 517-522 - Haitao Meng, Chonghao Zhong, Jianfeng Gu, Gang Chen:
A GPU -accelerated Deep Stereo- LiDAR Fusion for Real-time High-precision Dense Depth Sensing. 523-528 - Mohammad Hamad, Emanuel Regnath, Jan Lauinger, Vassilis Prevelakis, Sebastian Steinhorst:
SPPS: Secure Policy-based Publish/Subscribe System for V2C Communication. 529-534 - Daichi Watari, Ittetsu Taniguchi, Francky Catthoor, Charalampos Marantos, Kostas Siozios, Elham Shirazi, Dimitrios Soudris, Takao Onoye:
Thermal Comfort Aware Online Energy Management Framework for a Smart Residential Building. 535-538 - Jonas Peeck, Johannes Schlatow, Rolf Ernst:
Online latency monitoring of time-sensitive event chains in safety-critical applications. 539-542 - Wei Zhang, Songran Liu, Mingsong Lv, Qiulin Chen, Nan Guan:
Intermittent Computing with Efficient State Backup by Asynchronous DMA. 543-548 - Cezar Reinbrecht, Abdullah Aljuffri, Said Hamdioui, Mottaqiallah Taouil, Johanna Sepúlveda:
GRINCH: A Cache Attack against GIFT Lightweight Cipher. 549-554 - Melissa Azouaoui, Kostas Papagiannopoulos, Dominik Zürner:
Blind Side-Channel SIFA. 555-560 - Anubhab Baksi, Shivam Bhasin, Jakub Breier, Anupam Chattopadhyay, Vinay B. Y. Kumar:
Feeding Three Birds With One Scone: A Generic Duplication Based Countermeasure To Fault Attacks. 561-564 - David Pokorný, Petr Socha, Martin Novotný:
Side-channel attack on Rainbow post-quantum signature. 565-568 - Muhtadi Choudhury, Domenic Forte, Shahin Tajik:
PATRON: A Pragmatic Approach for Encoding Laser Fault Injection Resistant FSMs. 569-574 - Pai-Yu Tan, Cheng-Wen Wu, Juin-Ming Lu:
An Improved STBP for Training High-Accuracy and Low-Spike-Count Spiking Neural Networks. 575-580 - Wachirawit Ponghiran, Kaushik Roy:
Hybrid Analog-Spiking Long Short-Term Memory for Energy Efficient Computing on Edge Devices. 581-586 - Dehua Liang, Masanori Hashimoto, Hiromitsu Awano:
BloomCA: A Memory Efficient Reservoir Computing Hardware Implementation Using Cellular Automata and Ensemble Bloom Filter. 587-590 - Jung-Eun Kim, Richard M. Bradford, Max Del Giudice, Zhong Shao:
Paired Training Framework for Time-Constrained Learning. 591-596 - Sukhan Lee, Soojin Lee:
Machine Learning Based Real-Time Industrial Bin-Picking: Hybrid and Deep Learning Approaches. 597-602 - Davide Cannizzaro, Antonio Giuseppe Varrella, Stefano Paradiso, Roberta Sampieri, Enrico Macii, Edoardo Patti, Santa Di Cataldo:
Image analytics and machine learning for in-situ defects detection in Additive Manufacturing. 603-608 - Zijie Ren, Jiafu Wan:
Strengthening Digital Twin Applications based on Machine Learning for Complex Equipment. 609-614 - Florian Fricke, Safdar Mahmood, Javier Hoffmann, Marcelo Brandalero, Sascha Liehr, Simon Kern, Klas Meyer, Stefan Kowarik, Stephan Westerdick, Michael Maiwald, Michael Hübner:
Artificial Intelligence for Mass Spectrometry and Nuclear Magnetic Resonance Spectroscopy. 615-620 - Amine Jaamoum, Thomas Hiscock, Giorgio Di Natale:
Scramble Cache: An Efficient Cache Architecture for Randomized Set Permutation. 621-626 - Nils Wistoff, Moritz Schneider, Frank K. Gürkaynak, Luca Benini, Gernot Heiser:
Microarchitectural Timing Channels and their Prevention on an Open-Source 64-bit RISC-V Core. 627-632 - Sarani Bhattacharya, Ingrid Verbauwhede:
Exploring Micro-architectural Side-Channel Leakages through Statistical Testing. 633-636 - Vishal Gupta, Vinod Ganesan, Biswabandan Panda:
Seclusive Cache Hierarchy for Mitigating Cross-Core Cache and Coherence Directory Attacks. 637-640 - Ivan De Oliveira Nunes, Sashidhar Jakkamsetti, Gene Tsudik:
Tiny-CFA: Minimalistic Control-Flow Attestation Using Verified Proofs of Execution. 641-646