- Alfred L. Crouch:
Future Trends in Test: The Adoption and Use of Low Cost Structural Testers. ITC 2004: 698-703 - W. Robert Daasch, Manu Rehani:
Dude! Where's my data? - Cracking Open the Hermetically Sealed Tester. ITC 2004: 1428 - Foster F. Dai, Charles E. Stroud, Dayu Yang, Shuying Qi:
Automatic Linearity (IP3) Test with Built-in Pattern Generator and Analyzer. ITC 2004: 271-280 - Ramyanshu Datta, Ravi Gupta, Antony Sebastine, Jacob A. Abraham, Manuel A. d'Abreu:
Tri-Scan: A Novel DFT Technique for CMOS Path Delay Fault Testing. ITC 2004: 1118-1127 - Baolin Deng, Wolfram Glauert:
Formal Description of Test Specification and ATE Architecture for Mixed-Signal Test. ITC 2004: 1081-1090 - David Dowding, Ernie Wahl, Don Organ:
Extending STIL 1450 Standard for Test Program Flow. ITC 2004: 423-431 - Bill Eklow:
What Do You Mean My Board Test Stinks? ITC 2004: 1423 - Bill Eklow, Anoosh Hosseini, Chi Khuong, Shyam Pullela, Toai Vo, Hien Chau:
Simulation Based System Level Fault Insertion Using Co-verification Tools. ITC 2004: 704-710 - Hérvé Fleury:
Electronic circuit comprising a secret sub-module. ITC 2004: 1412 - Anne E. Gattiker:
Diagnosis Meets Physical Failure Analysis: How Long can we Succeed? ITC 2004: 1441 - Maurizio Gavardoni, Michael Jones, Russell Poffenberger, Miguel Conde:
System Monitor for Diagnostic, Calibration and System Configuration. ITC 2004: 1263-1268 - Valentin Gherman, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Michael Garbers:
Efficient Pattern Mapping for Deterministic Logic BIST. ITC 2004: 48-56 - Shalini Ghosh, Nur A. Touba, Sugato Basu:
Reducing Power Consumption in Memory ECC Checkers. ITC 2004: 1322-1331 - Pamela S. Gillis, Francis Woytowich, Andrew Ferko, Kevin McCauley:
Low Overhead Delay Testing of ASICS. ITC 2004: 534-542 - Ad J. van de Goor, Said Hamdioui, Rob Wadsworth:
Detecting Faults in the Peripheral Circuits and an Evaluation of SRAM Tests. ITC 2004: 114-123 - Xinli Gu, Cyndee Wang, Abby Lee, Bill Eklow, Kun-Han Tsai, Jan Arild Tofte, Mark Kassab, Janusz Rajski:
Realizing High Test Quality Goals with Smart Test Resource Usage. ITC 2004: 525-533 - Puneet Gupta, Michael S. Hsiao:
ALAPTF: A new Transition Faultmodel and the ATPG Algorithm. ITC 2004: 1053-1060 - José Pineda de Gyvez, Guido Gronthoud, Cristiano Cenci, Martin Posch, Thomas Burger, Manfred Koller:
Power Supply Ramping for Quasi-static Testing of PLLs. ITC 2004: 980-987 - Mohamed Hafed:
Glamorous Analog Testability - We Already Test them and Ship Them - So What is the Problem? ITC 2004: 1416 - Mohamed M. Hafed, Antonio H. Chan, Geoffrey D. Duerden, Bardia Pishdad, Clarence Tam, Sébastien Laberge, Gordon W. Roberts:
A High-Throughput 5 GBps Timing and Jitter Test Module Featuring Localized Processing. ITC 2004: 728-737 - Juha Häkkinen, Pekka Syri, Juha-Veikko Voutilainen, Markku Moilanen:
A Frequency Mixing and Sub-Sampling Based RF-Measurement Apparatus for IEEE 1149.4. ITC 2004: 551-559 - Gert Hansel, Korbinian Stieglbauer:
Implementation of an Economic Jitter Compliance Test for a Multi-Gigabit Device on ATE. ITC 2004: 1303-1312 - Hans T. Heineken, Jitendra Khare:
Test Strategies For a 40Gbps Framer SoC. ITC 2004: 758-763 - Dongwoo Hong, Chee-Kian Ong, Kwang-Ting (Tim) Cheng:
BER Estimation for Serial Links Based on Jitter Spectrum and Clock Recovery Characteristics. ITC 2004: 1138-1147 - Jonathan Hops, Brian Swing, Brian Phelps, Bruce Sudweeks, John Pane, James Kinslow:
Non-Deterministic DUT Behavior During Functional Testing of High Speed Serial Busses: Challenges and Solutions. ITC 2004: 190-196 - Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi:
Routability and Fault Tolerance of FPGA Interconnect Architectures. ITC 2004: 479-488 - Leendert M. Huisman, Maroun Kassab, Leah Pastel:
Data Mining Integrated Circuit Fails with Fail Commonalities. ITC 2004: 661-668 - Shahdad Irajpour, Sandeep K. Gupta, Melvin A. Breuer:
Timing-Independent Testing of Crosstalk in the Presence of Delay Producing Defects Using Surrogate Fault Models. ITC 2004: 1024-1033 - Hanjun Jiang, Beatriz Olleta, Degang Chen, Randall L. Geiger:
Testing High Resolution ADCs with Low Resolution/Accuracy Deterministic Dynamic Element Matched DACs. ITC 2004: 1379-1388 - John C. Johnson:
Options for High-Volume Test of Multi-GB/s Ports. ITC 2004: 1435