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Publication search results
found 1,003 matches
- 2024
- Jonah Van Assche, Georges G. E. Gielen:
Analysis and Design of a 10.4-ENOB 0.92-5.38-μW Event-Driven Level-Crossing ADC With Adaptive Clocking for Time-Sparse Edge Applications. IEEE J. Solid State Circuits 59(9): 2858-2869 (2024) - Jooyoung Bae, Wonsik Oh, Jahyun Koo, Chengshuo Yu, Bongjin Kim:
CTLE-Ising: A Continuous-Time Latch-Based Ising Machine Featuring One-Shot Fully Parallel Spin Updates and Equalization of Spin States. IEEE J. Solid State Circuits 59(1): 173-183 (2024) - Hikmet Çeliker, Florian De Roose, Myriam Willegems, Steve Smout, Wim Dehaene, Kris Myny:
Analysis and Comparison of Logic Architectures for Digital Circuits in a-IGZO Thin-Film Transistor Technologies. IEEE J. Solid State Circuits 59(6): 1858-1870 (2024) - Rob A. Damsteegt, Ramon W. J. Overwater, Masoud Babaie, Fabio Sebastiano:
A Benchmark of Cryo-CMOS Embedded SRAM/DRAMs in 40-nm CMOS. IEEE J. Solid State Circuits 59(7): 2042-2054 (2024) - Kristof Dens, Joren Vaes, Christian Blümm, Gabriel Guimaraes, Berke Gungor, Changsong Xie, Alexander Dyck, Patrick Reynaert:
Design of a Noncoherent 100-Gb/s 3-m Dual-Band PAM-4 Dielectric Waveguide Link in 28-nm CMOS. IEEE J. Solid State Circuits 59(5): 1398-1408 (2024) - Kathleen Feng, Taeyoung Kong, Kalhan Koul, Jackson Melchert, Alex Carsello, Qiaoyi Liu, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Christopher Torng, Mark Horowitz, Priyanka Raina:
Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. IEEE J. Solid State Circuits 59(3): 947-959 (2024) - Bastien Giraud, Sebastien Ricavy, Cyrille Laffond, Ilan Sever, Valentin Gherman, Florent Lepin, Mariam Diallo, Khadija Zenati, Sylvain Dumas, Olivier Guille, Maxim Vershkov, Alessandro Bricalli, Giuseppe Piccolboni, Jean-Philippe Noel, Anass Samir, Gaël Pillonnet, Yvain Thonnart, Gabriel Molas:
Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro. IEEE J. Solid State Circuits 59(9): 3045-3057 (2024) - Yuanqing Huang, Yogesh Ramadass, Dongsheng Ma:
Design of Direct 48-V/1-V Three-Path Four-State Switching Power Converter With Adaptive VCF Rebalancing and Dual-Edge tdead Modulation. IEEE J. Solid State Circuits 59(5): 1592-1602 (2024) - Agata Iesurum, Davide Manente, Fabio Padovan, Matteo Bassi, Andrea Bevilacqua:
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs. IEEE J. Solid State Circuits 59(1): 294-306 (2024) - Taewook Kang, Seungjong Lee, Seungheun Song, Mohammad Reza Haghighat, Michael P. Flynn:
A Multimode 157 μW 4-Channel 80 dBA-SNDR Speech Recognition Frontend With Direction-of-Arrival Correction Adaptive Beamformer. IEEE J. Solid State Circuits 59(6): 1794-1808 (2024) - Farzad Khoeini, Bardia Pezeshki, Emad Afifi, Alex Tselikov, Robert F. Kalman, Bahareh Hadidian, Ehsan Afshari:
Parallel Versus Serial: Design of an Optical Receiver With Integrated Blue Photodetectors and Digitally Tunable Low-End Cutoff Frequency for MicroLED-Based Parallel Interchip Communication. IEEE J. Solid State Circuits 59(5): 1578-1591 (2024) - Chia-Chi Kuo, Rihito Kuroda:
A 134×132 4-Tap CMOS Indirect Time-of-Flight Range Imager Using In-Pixel Memory Array With 10 Kfps High-Speed Mode and High Precision Mode. IEEE J. Solid State Circuits 59(2): 492-501 (2024) - Jiaxin Lei, Xiliang Liu, Wei Song, Heng Huang, Xiaoyan Ma, Junliang Wei, Milin Zhang:
Design of a Low-Power, High-Data-Rate, and Crystal-Less All-Digital IR-UWB Transmitter for High-Density Neural Implants. IEEE J. Solid State Circuits 59(7): 2159-2170 (2024) - Seunghyun Moon, Han-Gyeol Mun, Hyunwoo Son, Jae-Yoon Sim:
Multipurpose Deep-Learning Accelerator for Arbitrary Quantization With Reduction of Storage, Logic, and Latency Waste. IEEE J. Solid State Circuits 59(1): 143-156 (2024) - Shanthi Pavan, Saravana Manivannan, Nishanth Basavaraj:
Analysis and Design of Wideband Filtering ADCs Using Continuous-Time Pipelining. IEEE J. Solid State Circuits 59(1): 268-281 (2024) - Murali Krishna Rajendran, Priya Venugopal, Gajendranath Chowdary:
An Incremental Step Sensing MPPT Based SI-SIDO Energy Harvester With >99% Peak MPPT Efficiency for an Input Power Range of 30 μW to 33 mW. IEEE J. Solid State Circuits 59(4): 1271-1282 (2024) - Yi Tan, Cheng Huang, Hiroki Ishikuro:
Design of Dual Lower Bound Hysteresis Control in Switched-Capacitor DC-DC Converter for Optimum Efficiency and Transient Speed in Wide Loading Range for IoT Application. IEEE J. Solid State Circuits 59(6): 1823-1834 (2024) - Hsing-Yen Tsai, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A GaN-on-Si Gate Driver With Self-Pumped Drive Enhance and Short-Period Negative Voltage Techniques for Reduction of 14.7× Tailing Power Loss and 37% Reverse Conduction Loss. IEEE J. Solid State Circuits 59(3): 784-793 (2024) - Chi-Wa U, Man-Kay Law, Rui Paulo Martins, Chi-Seng Lam:
Sub-μW Auto-Calibration Bandgap Voltage Reference With 1σ Inaccuracy of ± 0.12% Within - 40°C to 120°C. IEEE J. Solid State Circuits 59(2): 540-550 (2024) - Junjie Wang, Teng Zhang, Shuang Liu, Yihe Liu, Yuancong Wu, Shaogang Hu, Tupei Chen, Yang Liu, Yuchao Yang, Ru Huang:
Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip. IEEE J. Solid State Circuits 59(2): 595-604 (2024) - Qiuzhen Xu, Gen Li, Yanyan Liu, Feng Luo, Zhiming Xiao:
A 64-Channel Inverter-Based Neural Signal Recording Amplifier With a Novel Differential-Like OTA Achieving an NEF of 0.84. IEEE J. Solid State Circuits 59(8): 2430-2440 (2024) - Robin Ying, Alyosha C. Molnar:
Design of High Dynamic Range HBT N-Path Receivers With Dual-Resonant-Mode LO Drive. IEEE J. Solid State Circuits 59(9): 2805-2817 (2024) - Mohammadreza Zeinali, Szu-Yao Hung, Sudhakar Pamarti:
Design and Analysis of a Fractional Frequency Synthesizer With <90-fs Jitter and <-103-dBc Spurious Tones Using Digital Spur Cancellation. IEEE J. Solid State Circuits 59(10): 3417-3431 (2024) - Chaorui Zou, Yaozhong Ou, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang:
A 256 × 192 -Pixel Direct Time-of-Flight LiDAR Receiver With a Current-Integrating-Based AFE Supporting 240-m-Range Imaging. IEEE J. Solid State Circuits 59(11): 3525-3537 (2024) - 2023
- Fatemeh Aghlmand, Chelsea Hu, Saransh Sharma, Krishna K. Pochana, Richard M. Murray, Azita Emami:
A 65-nm CMOS Fluorescence Sensor for Dynamic Monitoring of Living Cells. IEEE J. Solid State Circuits 58(11): 3003-3019 (2023) - Alican Çaglar, Steven Van Winckel, Steven Brebels, Piet Wambacq, Jan Craninckx:
Design and Analysis of a 4.2 mW 4 K 6-8 GHz CMOS LNA for Superconducting Qubit Readout. IEEE J. Solid State Circuits 58(6): 1586-1596 (2023) - Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A Miniaturized 3-D-MRI Scanner Featuring an HV-SOI ASIC and Achieving a 10 × 8 × 8 mm3 Field of View. IEEE J. Solid State Circuits 58(7): 2028-2039 (2023) - Ahmad Khairi, Yoel Krupnik, Amir Laufer, Yoav Segal, Marco Cusmai, Itamar Levin, Ari Gordon, Yaniv Sabag, Vitali Rahinski, Idan Lotan, Gadi Ori, Noam Familia, Stas Litski, Tali Warshavsky Grafi, Udi Virobnik, Dror Lazar, Yeshayahu Horwitz, Ajay Balankutty, Shiva Kiran, Samuel Palermo, Peng Mike Li, Frank O'Mahony, Ariel Cohen:
A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels. IEEE J. Solid State Circuits 58(1): 8-18 (2023) - Ji-Young Kim, Taeryeong Kim, Jeonghyeok You, Ki-Ryong Kim, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung:
An Energy-Efficient Design of TSV I/O for HBM With a Data Rate up to 10 Gb/s. IEEE J. Solid State Circuits 58(11): 3242-3252 (2023) - Nahmil Koo, Hyojun Kim, SeongHwan Cho:
A 43.3-μW Biopotential Amplifier With Tolerance to Common-Mode Interference of 18 Vpp and T-CMRR of 105 dB in 180-nm CMOS. IEEE J. Solid State Circuits 58(2): 508-519 (2023)
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