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Publication search results
found 16 matches
- 2022
- Kohei Fukuhara, Ryo Kumagai, Fukawa Yuta, Shin-ichi Tanabe, Hiroki Kawano, Yoshihiro Ohta, Hiroyuki Sato:
Digital Twin Based Evolutionary Building Facility Control Optimization. CEC 2022: 1-8 - Ryoji Tanabe, Youhei Akimoto, Ken Kobayashi
, Hiroshi Umeki, Shinichi Shirakawa, Naoki Hamada:
A two-phase framework with a bézier simplex-based interpolation method for computationally expensive multi-objective optimization. GECCO 2022: 601-610 - Ryoji Tanabe, Youhei Akimoto, Ken Kobayashi
, Hiroshi Umeki, Shinichi Shirakawa, Naoki Hamada:
A Two-phase Framework with a Bézier Simplex-based Interpolation Method for Computationally Expensive Multi-objective Optimization. CoRR abs/2203.15292 (2022) - 2021
- Takehito Kikuchi, Okito Shimazu, Yasuhiro Yamamoto, Mikiko Nakano, Sachiko Ichiyama, Sayuri Kawai, Asuka Orii, Shinichi Tanabe:
Motion Analysis of Transfer Operation from Bed to Wheelchair for Care-giver and -receiver with Wearable Motion Capture. SII 2021: 477-481 - 2018
- Yasuhiro Hayashi
, Yu Fujimoto
, Hideo Ishii, Yuji Takenobu
, Hiroshi Kikusato
, Shinya Yoshizawa
, Yoshiharu Amano
, Shin-ichi Tanabe
, Yohei Yamaguchi
, Yoshiyuki Shimoda
, Jun Yoshinaga, Masato Watanabe, Shunsuke Sasaki, Takeshi Koike, Hans-Arno Jacobsen, Kevin Tomsovic:
Versatile Modeling Platform for Cooperative Energy Management Systems in Smart Cities. Proc. IEEE 106(4): 594-612 (2018) - Yu Fujimoto
, Hiroshi Kikusato
, Shinya Yoshizawa
, Shunsuke Kawano, Akira Yoshida
, Shinji Wakao
, Noboru Murata
, Yoshiharu Amano, Shin-ichi Tanabe
, Yasuhiro Hayashi
:
Distributed Energy Management for Comprehensive Utilization of Residential Photovoltaic Outputs. IEEE Trans. Smart Grid 9(2): 1216-1227 (2018) - 2017
- Ryoichi Kuroha, Yu Fujimoto
, Wataru Hirohashi, Yoshiharu Amano, Shin-ichi Tanabe
, Yasuhiro Hayashi
:
Development of prediction-based operation planning method for domestic air-conditioner with adaptive learning of installation environment. ISGT 2017: 1-5 - Moeka Tanabe, Kenji Tei, Yoshiaki Fukazawa, Shinichi Honiden:
Learning environment model at runtime for self-adaptive systems. SAC 2017: 1198-1204 - 2014
- Kaori Warabi, Rai Kou, Shinichi Tanabe, Tai Tsuchizawa, Satoru Suzuki
, Hiroki Hibino
, Hirochika Nakajima, Koji Yamada
:
Optical absorption characteristics and polarization dependence of single-layer graphene on silicon waveguide. IEICE Trans. Electron. 97-C(7): 736-743 (2014) - 2013
- Wataru Mizubayashi, Koichi Fukuda, Takahiro Mori, Kazuhiko Endo
, Yongxun Liu, Takashi Matsukawa, Shin-ichi O'Uchi, Yuki Ishikawa, Shinji Migita, Yukinori Morita, Akihito Tanabe, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara, Hiroyuki Ota:
Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes. ESSDERC 2013: 202-205 - Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Akihito Tanabe, Koichi Fukuda, Takashi Matsukawa, Kazuhiko Endo
, Shin-ichi O'Uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota:
Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations. ESSDERC 2013: 45-48 - Yuta Maezawa, Hironori Washizaki
, Yoshinori Tanabe, Shinichi Honiden:
Automated verification of pattern-based interaction invariants in Ajax applications. ASE 2013: 158-168 - 2012
- Akifumi Kawahara, Ryotaro Azuma, Yuuichirou Ikeda, Ken Kawai, Yoshikazu Katoh, Kouhei Tanabe, Toshihiro Nakamura, Yoshihiko Sumimoto, Naoki Yamada, Nobuyuki Nakai, Shoji Sakamoto, Yukio Hayakawa, Kiyotaka Tsuji, Shinichi Yoneda, Atsushi Himeno, Ken-ichi Origasa, Kazuhiko Shimakawa, Takeshi Takagi, Takumi Mikawa, Kunitoshi Aono:
An 8Mb multi-layered cross-point ReRAM macro with 443MB/s write throughput. ISSCC 2012: 432-434 - 2009
- Shin'ichi Oishi, Kunio Tanabe:
Numerical Inclusion of Optimum Point for Linear Programming. JSIAM Lett. 1: 5-8 (2009) - 2000
- Yasuhiro Takai, Mamoru Fujita, Kyoichi Nagata, Satoshi Isa, Shigeyuki Nakazawa, Atsunori Hirobe, Hiroaki Ohkubo, Masato Sakao, Shinichi Horiba, Tadashi Fukase, Yoshihiro Takaishi, Makoto Matsuo, Masahiro Komuro, Tetsuya Uchida, Takashi Sakoh, Kanta Saino, Shirou Uchiyama, Yuichi Takada, Junichi Sekine, Nobuko Nakanishi, Takeshi Oikawa, Masahiko Igeta, Hiroyoshi Tanabe, Hidenobu Miyamoto, Takeo Hashimoto, Hiromu Yamaguchi, Kuniaki Koyama, Yasuo Kobayashi, Takashi Okuda:
A 250-Mb/s/pin, 1-Gb double-data-rate SDRAM with a bidirectional delay and an interbank shared redundancy scheme. IEEE J. Solid State Circuits 35(2): 149-162 (2000) - 1997
- Satoshi Shigematsu, Shin'ichiro Mutoh, Yasuyuki Matsuya, Yasuyuki Tanabe, Junzo Yamada:
A 1-V high-speed MTCMOS circuit scheme for power-down application circuits. IEEE J. Solid State Circuits 32(6): 861-869 (1997)
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retrieved on 2024-09-03 00:15 CEST from data curated by the dblp team
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