• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 84 matches

• 2011
• 
  Tom Vander Aa, Martin Palkovic, Matthias Hartmann, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre:
  A multi-threaded coarse-grained array processor for wireless baseband. SASP 2011: 102-107
• 
  Maximilien Breughe, Zheng Li, Yang Chen, Stijn Eyerman, Olivier Temam, Chengyong Wu, Lieven Eeckhout:
  How sensitive is processor customization to the workload's input datasets? SASP 2011: 1-7
• 
  Liang Chen, Nicolas Boichat, Tulika Mitra:
  Customized MPSoC synthesis for task sequence. SASP 2011: 16-21
• 
  Shuo-Hung Chen, Hsiao-Mei Lin, Hsin-Wen Wei, Yi-Cheng Chen, Chih-Tsun Huang, Yeh-Ching Chung:
  Hardware/software co-designed accelerator for vector graphics applications. SASP 2011: 108-114
• 
  Anthony Chun, Jenny X. Chang, Zhen Fang, Ravishankar R. Iyer, Michael Deisher:
  ISIS: An accelerator for Sphinx speech recognition. SASP 2011: 58-61
• 
  Jason Cong, Muhuan Huang, Yi Zou:
  3D recursive Gaussian IIR on GPU and FPGAs - A case for accelerating bandwidth-bounded applications. SASP 2011: 70-73
• 
  Amin Farmahini Farahani, Anthony E. Gregerson, Michael J. Schulte, Katherine Compton:
  Modular high-throughput and low-latency sorting units for FPGAs in the Large Hadron Collider. SASP 2011: 38-45
• 
  Naim Harb, Smaïl Niar, Mazen A. R. Saghir, Yassin Elhillali, Rabie Ben Atitallah:
  Dynamically reconfigurable architecture for a driver assistant system. SASP 2011: 62-65
• 
  Chen Huang, Frank Vahid:
  Scalable object detection accelerators on FPGAs using custom design space exploration. SASP 2011: 115-121
• 
  David Kesler, Biplab Deka, Rakesh Kumar:
  A hardware acceleration technique for gradient descent and conjugate gradient. SASP 2011: 94-101
• 
  Roto Le, R. Iris Bahar, Joseph L. Mundy:
  A novel parallel Tier-1 coder for JPEG2000 using GPUs. SASP 2011: 129-136
• 
  Hongjian Li, Bing Ni, Man Hon Wong, Kwong-Sak Leung:
  A fast CUDA implementation of agrep algorithm for approximate nucleotide sequence matching. SASP 2011: 74-77
• 
  Abhinandan Majumdar, Srihari Cadambi, Srimat T. Chakradhar, Hans Peter Graf:
  A parallel accelerator for semantic search. SASP 2011: 122-128
• 
  Giovanni Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria:
  ARTE: An Application-specific Run-Time management framework for multi-core systems. SASP 2011: 86-93
• 
  Richard Membarth, Frank Hannig, Jürgen Teich, Mario Körner, Wieland Eckert:
  Frameworks for GPU Accelerators: A comprehensive evaluation using 2D/3D image registration. SASP 2011: 78-81
• 
  Sergey Morozov, Christian Tergino, Patrick Schaumont:
  System integration of Elliptic Curve Cryptography on an OMAP platform. SASP 2011: 52-57
• 
  Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu:
  Integrating formal verification and high-level processor pipeline synthesis. SASP 2011: 22-29
• 
  Adarsha Rao, S. K. Nandy, Hristo Nikolov, Ed F. Deprettere:
  USHA: Unified software and hardware architecture for video decoding. SASP 2011: 30-37
• 
  Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
  TARCAD: A template architecture for reconfigurable accelerator designs. SASP 2011: 8-15
• 
  Rishvanth Kora Venugopal, J. Robert Heath, Daniel L. Lau:
  FPGA based parallel architecture implementation of Stacked Error Diffusion algorithm. SASP 2011: 66-69
• 
  Guohui Wang, Michael Wu, Yang Sun, Joseph R. Cavallaro:
  A massively parallel implementation of QC-LDPC decoder on GPU. SASP 2011: 82-85
• 
  Bo Zhou, Xiaobo Sharon Hu, Danny Z. Chen:
  Memory-efficient volume ray tracing on GPU for radiotherapy. SASP 2011: 46-51
• 
  IEEE 9th Symposium on Application Specific Processors, SASP 2011, San Diego, CA, USA, June 5-6, 2011. IEEE Computer Society 2011, ISBN 978-1-4577-1211-1 [contents]
• 2010
• 
  Dominik Auras, Sylvain Girbal, Hugues Berry, Olivier Temam, Sami Yehia:
  CMA: Chip multi-accelerator. SASP 2010: 8-15
• 
  Ahmed O. El-Rayis, Tughrul Arslan, Ahmet T. Erdogan:
  A processing engine for GPS correlation. SASP 2010: 44-49
• 
  Khodor Ahmad Fawaz, Tughrul Arslan, Sami Khawam, Mark Muir, Ioannis Nousias, Iain Lindsay, Ahmet T. Erdogan:
  A dynamically reconfigurable asynchronous processor. SASP 2010: 93-96
• 
  Jingtong Hu, Chun Jason Xue, Wei-Che Tseng, Qingfeng Zhuge, Edwin Hsing-Mean Sha:
  Minimizing write activities to non-volatile memory via scheduling and recomputation. SASP 2010: 101-106
• 
  Jer-Min Jou, Yun-Lung Lee, Sih-Sian Wu:
  Efficient design and generation of a multi-facet arbiter. SASP 2010: 111-114
• 
  Ji Kong, Peilin Liu, Xianmin Chen, Jin Wang, Xingguang Pan, Jun Wang, He Xiao, Zhenqi Wei, Rendong Ying:
  Next-generation consumer audio application specific embedded processor. SASP 2010: 1-7
• 
  Ruby B. Lee, Yu-Yuan Chen:
  Processor accelerator for AES. SASP 2010: 16-21

skipping 54 more matches