• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 34 matches

• 2018
• 
  Mohammad Abdel-Majeed, Waleed Dweik:
  Low overhead online periodic testing for GPGPUs. Integr. 62: 362-370 (2018)
• 
  J. Ahmadi-Farsani, Hamed Sadjedi, M. B. Ghaznavi-Ghoushchi:
  An ultra low-power current-mode clock and data recovery design with input bit-rate adaptability for biomedical applications in CMOS 90 nm. Integr. 62: 238-245 (2018)
• 
  Amir Ardakani, Shahriar B. Shokouhi, Arash Reyhani-Masoleh:
  Improving performance of FPGA-based SR-latch PUF using Transient Effect Ring Oscillator and programmable delay lines. Integr. 62: 371-381 (2018)
• 
  Mohamed Khairy Bahry, Mohamed El-Nozahi, Emad Hegazi:
  An all-digital low ripples capacitive DC-DC converter with load tracking controller. Integr. 62: 123-131 (2018)
• 
  Dimitrios Balobas, Nikos Konofaos:
  High-performance and energy-efficient 64-bit incrementer/decrementer using Multiple-Output Monotonic CMOS. Integr. 62: 270-281 (2018)
• 
  M. Mohamed Asan Basiri, Sandeep K. Shukla:
  Low power hardware implementations for network packet processing elements. Integr. 62: 170-181 (2018)
• 
  Ismail Bayram, Yiran Chen:
  NV-TCAM: Alternative designs with NVM devices. Integr. 62: 114-122 (2018)
• 
  Safa Berrima, Yves Blaquière, Yvon Savaria:
  Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits. Integr. 62: 159-169 (2018)
• 
  Navonil Chatterjee, Priyajit Mukherjee, Santanu Chattopadhyay:
  Reliability-aware application mapping onto mesh based Network-on-Chip. Integr. 62: 92-113 (2018)
• 
  Mohammad Danaie, Esmaeel Ranjbar, Mojtaba Ahmadieh Khanesar:
  MOSCAP compensation of three-stage operational amplifiers: Sensitivity and robustness, modeling and analysis. Integr. 62: 34-49 (2018)
• 
  Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar:
  Offline Testing of Reversible Logic Circuits: An Analysis. Integr. 62: 50-67 (2018)
• 
  Arindrajit Ghosh, Uddalak Bhattacharya, Swapna Banerjee:
  Contention free delayed keeper for high density large signal sensing memory compiler. Integr. 62: 24-33 (2018)
• 
  Paria Jamshidi, Mohammad Maymandi-Nejad:
  Analysis of the impact of interferers on VCO-based continuous time delta-sigma modulators. Integr. 62: 132-141 (2018)
• 
  Stefan Kristofík, Peter Malík:
  Enhancement of fault collection for embedded RAM redundancy analysis considering intersection and orphan faults. Integr. 62: 190-204 (2018)
• 
  Etienne Lepercq, Yves Blaquière, Yvon Savaria:
  A pattern-based routing algorithm for a novel electronic system prototyping platform. Integr. 62: 224-237 (2018)
• 
  Tuotian Liao, Lihong Zhang:
  Efficient parasitic-aware hybrid sizing methodology for analog and RF integrated circuits. Integr. 62: 301-313 (2018)
• 
  Mitesh Limachia, Dixit Vyas, Rajesh Amratlal Thakker, Nikhil Kothari:
  Hybrid offset compensated latch-type sense amplifier for tri-gated FinFET technology. Integr. 62: 258-269 (2018)
• 
  Chang Liu, Xu He, Bin Liang, Yang Guo:
  Detailed placement for pulse quenching enhancement in anti-radiation combinational circuit design. Integr. 62: 182-189 (2018)
• 
  Yufei Ma, Naveen Suda, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo:
  ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler. Integr. 62: 14-23 (2018)
• 
  Anushree Mahapatra, Yidi Liu, Benjamin Carrión Schäfer:
  Accelerating cycle-accurate system-level simulations through behavioral templates. Integr. 62: 282-291 (2018)
• 
  Sachin Maheshwari, Vivian A. Bartlett, Izzet Kale:
  Energy efficient implementation of multi-phase quasi-adiabatic Cyclic Redundancy Check in near field communication. Integr. 62: 341-352 (2018)
• 
  Nadia Nedjah, Heloisa Dina Bezerra, Luiza de Macedo Mourelle:
  Automatic generation of harmonious music using cellular automata based hardware design. Integr. 62: 205-223 (2018)
• 
  Adam Opara, Marcin Kubica, Dariusz Kania:
  Strategy of logic synthesis using MTBDD dedicated to FPGA. Integr. 62: 142-158 (2018)
• 
  Murat Pak, Francisco V. Fernández, Günhan Dündar:
  A novel design methodology for the mixed-domain optimization of a MEMS accelerometer. Integr. 62: 314-321 (2018)
• 
  Mohammad Mehdi Panahi, Omid Hashemipour, Keivan Navi:
  A novel design of a ternary coded decimal adder/subtractor using reversible ternary gates. Integr. 62: 353-361 (2018)
• 
  Ioannis A. Papistas, Vasilis F. Pavlidis:
  Contactless Heterogeneous 3-D ICs for Smart Sensing Systems. Integr. 62: 329-340 (2018)
• 
  Larry Pearlstein, Skyler Maxwell, Alex Aved:
  Adaptive prediction resolution video coding for reduced DRAM bandwidth. Integr. 62: 382-394 (2018)
• 
  Fabrizio Riente, Andrea Giordano, Marco Vacca, Mariagrazia Graziano:
  Exploring N³ASIC technology for microwave imaging architectures. Integr. 62: 395-405 (2018)
• 
  Mohammad Sadeghi, Hooman Nikmehr:
  Aging mitigation of L1 cache by exchanging instruction and data caches. Integr. 62: 68-75 (2018)
• 
  Xin-Yu Shih, Po-Chun Huang, Hong-Ru Chou:
  VLSI design and implementation of a reconfigurable hardware-friendly Polar encoder architecture for emerging high-speed 5G system. Integr. 62: 292-300 (2018)

skipping 4 more matches