


default search action
ARC 2013: Los Angeles, CA, USA
- Philip Brisk

, José Gabriel F. Coutinho, Pedro C. Diniz:
Reconfigurable Computing: Architectures, Tools and Applications - 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013. Proceedings. Lecture Notes in Computer Science 7806, Springer 2013, ISBN 978-3-642-36811-0
Applications
- Thomas C. P. Chau, Xinyu Niu, Alison Eele, Wayne Luk, Peter Y. K. Cheung, Jan M. Maciejowski:

Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications. 1-12 - James Arram, Kuen Hung Tsoi, Wayne Luk, Peiyong Jiang:

Hardware Acceleration of Genetic Sequence Alignment. 13-24 - Takuya Kuhara, Takaaki Miyajima, Masato Yoshimi, Hideharu Amano:

An FPGA Acceleration for the Kd-tree Search in Photon Mapping. 25-36 - Uli Kretzschmar, Armando Astarloa

, Jesús Lázaro
:
SEU Resilience of DES, AES and Twofish in SRAM-Based FPGA. 37-46 - Vitor Gomes

, Haroldo Fraga de Campos Velho, Andrea Charão
:
A Fast Poisson Solver for Hybrid Reconfigurable System. 47-58 - Hiroki Nakahara

, Tsutomu Sasao, Munehiro Matsuura:
An Architecture for IPv6 Lookup Using Parallel Index Generation Units. 59-71 - Jon T. Butler, Tsutomu Sasao:

Hardware Index to Set Partition Converter. 72-83 - Christopher J. Martinez:

Teaching SoC Using Video Games to Improve Student Engagement. 84-89
Arithmetic
- Tomohiro Ueno

, Yoshiaki Kono, Kentaro Sano, Satoru Yamamoto:
Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-Based Custom Computing. 90-102 - Shane T. Fleming, David B. Thomas:

Hardware Acceleration of Matrix Multiplication over Small Prime Finite Fields. 103-114 - Geoffrey Ottoy, Bart Preneel

, Jean-Pierre Goemaere, Lieven De Strycker
:
Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms. 115-121
Design Optimization for FPGAs
- Nuno Miguel Cardanha Paulino

, João Canas Ferreira
, João M. P. Cardoso
:
Architecture for Transparent Binary Acceleration of Loops with Memory Accesses. 122-133 - Maciej Kurek, Tobias Becker

, Wayne Luk:
Parametric Optimization of Reconfigurable Designs Using Machine Learning. 134-145 - Sam Skalicky, Sonia López, Marcin Lukowiak, James Letendre, Matthew Ryan:

Performance Modeling of Pipelined Linear Algebra Architectures on FPGAs. 146-153
Architectures
- Youenn Corre, Jean-Philippe Diguet, Loïc Lagadec

, Dominique Heller, Dominique Blouin:
Fast Template-Based Heterogeneous MPSoC Synthesis on FPGA. 154-166 - Fakhar Anjam, Stephan Wong:

Configurable Fault-Tolerance for a Configurable VLIW Processor. 167-178 - Debora Matos, Cezar Reinbrecht, Márcio Eduardo Kreutz, Gianluca Palermo

, Luigi Carro
, Altamiro Amadeu Susin:
Hierarchical and Multiple Switching NoC with Floorplan Based Adaptability. 179-184
Place and Routing
- Aurelio Morales-Villanueva

, Ann Gordon-Ross:
HTR: On-Chip Hardware Task Relocation for Partially Reconfigurable FPGAs. 185-196 - Vinod Pangracious

, Zied Marrakchi, Emna Amouri, Habib Mehrez:
Performance Analysis and Optimization of High Density Tree-Based 3D Multilevel FPGA. 197-209 - Mariem Turki

, Zied Marrakchi, Habib Mehrez, Mohamed Abid:
Iterative Routing Algorithm of Inter-FPGA Signals for Multi-FPGA Prototyping Platform. 210-217
Extended Abstracts (Posters)
- Yuya Shirahashi, Minoru Watanabe:

Dependability-Increasing Method of Processors under a Space Radiation Environment. 218 - Li Zhou

, Dongpei Liu, Botao Zhang, Hengzhu Liu:
Ant Colony Optimization for Application Mapping in Coarse-Grained Reconfigurable Array. 219 - Eric Shun Fukuda, Hideyuki Kawashima, Hiroaki Inoue, Taro Fujii, Koichiro Furuta, Tetsuya Asai, Masato Motomura

:
C-Based Adaptive Stream Processing on Dynamically Reconfigurable Hardware: A Case Study on Window Join. 220 - Qingshan Tang, Matthieu Tuna, Zied Marrakchi, Habib Mehrez:

Automatic Design Flow for Creating a Custom Multi-FPGA Board Netlist. 221 - Qi Guo, Chao Wang, Xuehai Zhou, Xi Li:

Pipeline Optimization for Loops on Reconfigurable Platform. 222 - Mohammed A. S. Abdallah:

FPGA-Based Adaptive Data Acquisition Scheduler-on-Chip (SchoC) for Heterogeneous Signals. 223 - Gabriel Nunez, Evan Tsai, Airs Lin, Aleksander Milshteyn

, Garth Herman, Helen Boussalis, Charles Liu:
High Level FPGA Modeling of an JPEG Encoder. 224 - Jingfei Jiang, Rongdong Hu, Mikel Luján, Yong Dou:

Empirical Evaluation of Fixed-Point Arithmetic for Deep Belief Networks. 225
Special Session: Research Projects in Reconfigurable and Embedded Computing (Extended Abstracts)
- José Gabriel F. Coutinho, João M. P. Cardoso

, Tiago Carvalho
, Ricardo Nobre
, Sujit Bhattacharya, Pedro C. Diniz, Liam Fitzpatrick, Razvan Nane
:
Deriving Resource Efficient Designs Using the REFLECT Aspect-Oriented Approach - (Extended Abstract). 226-228 - Stephan Wong:

Embedded Reconfigurable Architectures. 229-230 - Kiran Kumar Matam, Viktor K. Prasanna:

Algorithm Design Methodology for Embedded Architectures. 231-232 - Christos P. Antonopoulos, George Krikis, Nikolaos S. Voros

:
Efficient Hardware Based Security Algorithm Implementation for WSN Medical Applications: The ARMOR Perspective. 233-234 - George Goulas, Christos Gogos

, Christos Valouxis, Panayiotis Alefragis
, Nikolaos S. Voros
:
Coarse Grained Parallelism Optimization for Multicore Architectures: The ALMA Project Approach. 235-236

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID














