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ORCIDiSES 2024: New Delhi, India
- IEEE International Symposium on Smart Electronic Systems, iSES 2024, New Delhi, India, December 16-18, 2024. IEEE 2024, ISBN 979-8-3315-3322-9
- Vipin Gautam, Sharad Sinha, Shitala Prasad:
VATML: Towards On Device Ventricular Arrhythmia Detection Using TinyML. 1-6 - Sutapa Sen, Rapti Chaudhuri, Tanudeep Ganguly, Partha Pratim Das, Suman Deb:
You Only Look Once in Dark: An Analytical Approach for Low Light Object Detection. 7-12 - Kumar Navendu
, Vineet Sahula:
Word Level Sign Language Recognition Using MediaPipe and LSTM-GRU Network. 13-18 - Nivedita Madhukar Tawade, Mohan Bansal, Ramesh Saha:
Optimized Transfer Learning with CNNs for Superior COVID-19 Detection in Chest X-Ray Imaging. 19-24 - Suja Markose, Raghu C. V:
Development of an AI based Edge Computing System for Malayalam Vowel Classification. 25-29 - Nikita Rathor, Sharad Sinha:
Mender-FPGA: An Open Source Framework for FPGA Remote Update for ML Applications. 30-35 - Burra Subbarao, Chella Amala, Banee Bandana Das, Saswat Kumar Ram, Saraju P. Mohanty:
Fortified-SoC: A Novel Approach Towards Trojan Resilient System-on-Chip Design. 36-39 - Kanishk Kumar Sachan, Anisha Natarajan:
Proximity Detection Based Low-Cost and Handheld IoT Device for Tracking Lost Objects. 40-43 - J. Rahul, Renuka Kumaran, Lintu Rajan:
Variation of Sensitivity of AlGaN/GaN High Electron Mobility Transistor(HEMT) Based Hydrogen Gas Sensor on Thickness of AlGaN and Mole Fraction of Aluminium. 44-48 - P. K. Pandey, B. Bhuvan:
A 1024-Input Multi-Stage Voltage-Mode WTA Circuit for Selective Attention Based Processing in Massive Parallel Sensing Applications. 49-53 - Shivangi Shringi, Srinivasu Bodapati, Srikant Srinivasan:
Magnetic Skyrmions Based One-Bit Comparator. 54-59 - Md Asif Khan, Pydi Ganga Bahubalindruni, Alexander May, Chiara Rossi, Mathias Rommel:
Temperature Sensing Readout Circuits with 4H-SiC Technology. 60-63 - Anish M. George, Shajimon K. John, Kala S:
FPGA Implementation of an Efficient FIR Filter Using Double MAC Unit. 64-68 - Shivam Kumar Jha, Apsana Khatoon, Priyanka Tiwari, Dipti, Kavindra Kandpal, Manish Goswami, Prasanna Kumar Misra:
Low IF CMOS Receiver with 3-Stage LNA for Sub-GHz Communication. 69-74 - Subhadeep Nag, Suman Kalyan Porel, Dyuti Sengupta, Aniruddha Chandra, Hemanta Kumar Mondal:
Power Conscious Asynchronous FIFO for Forest Event Surveillance. 75-80 - Ishan Malhotra, Sarthak Grover, Deepank Grover, Tarun Sharma, Keshav Goel, Sujay Deb:
SleepTrackSoC: Design and Implementation of Power and Cost Efficient Cortex-M0 based Sleep Tracking SoC. 81-86 - Arijit Nath, Jitendra Meena:
Towards Harnessing the Potential of Compression and Encoding to Enhance NVM Lifespan. 87-92 - Vibhu, Shivang Bhargav, Vivek Kumar, Sparsh Mittal:
Machine Learning Based Algorithm for Shockley-Read-Hall Recombination and Augur Recombination Predictions. 93-98 - Yamana Ashok Kumar, Nithin Kumar Y. B, Vasantha M. H., Siddharth R. K.:
Power Reduction of a Level Triggered D Flip-Flop using Clock Gating and Power Gating Techniques. 99-103 - Abhishek Yadav, Ayush Dixit, Utsav Jana, Binod Kumar:
A Reconfigurable Floating-Point Compliant Hardware Architecture for Neural Network Implementation. 104-109 - Anirban Sengupta, Aditya Anshul, Vishal Chourasia:
HLS Based Hardware Watermarking Using IP Seller's Superimposed Facial Anthropometric Features. 110-115 - Anirban Sengupta, Rahul Chaurasia:
SWIFT: Swarm Intelligence Driven ESL Synthesis for Functional Trojan Fortification. 116-121 - Rahul Chaurasia, Anirban Sengupta:
Secure Accelerated Computing: High-Level Synthesis Based Hardware Accelerator Design for CNN Applications. 122-127 - Anirban Sengupta, Vishal Chourasia, Ayush Kumar Singh:
Gen-Sign: HLS Based Watermarking Using IP Vendor's Feistel Cipher Encrypted Genomic Signature for Protecting CNN and Image Processing Filter Cores Against Piracy. 128-133 - Anirban Sengupta, Vishal Chourasia, Nitish Kumar:
HLS driven Hybrid GA-PSO for Design Space Exploration of Optimal Palmprint Biometric based IP Watermark and Loop Unrolling Factor. 134-139 - Divya Aggarwal, R. Sai Chandra Teja, Sparsh Mittal:
A Stacking Ensemble Technique to Predict Speed and Distance in 4G and 5G Communication Datasets. 146-151 - Tushir Sahu, Vidhi Bhatt, Sparsh Mittal, R. Sai Chandra Teja, Nagesh Kumar S:
SPEEDNet: Salient Pyramidal Enhancement Encoder-Decoder Network for Colonoscopy Images. 152-157 - Nitish Kumar, Sneha Chaudhary, Kavindra Kandpal, Manish Goswami:
Highly Reliable, Feed-Forward and Multi-Arbiter based Physical Unclonable Function for IoT security. 158-163 - Abbas Murtaza, Khagendra Joshi, Sana Ali Naqvi, Vivek Ashok Bohara:
A GUI Based Digital IC Tester. 164-167 - Ajay Kumar, Alok Nikhil Jha:
Integrating Traditional Culinary Techniques with Modern Technology: Power Tandoor. 168-172 - Namit Gupta, Pravar Pathania, Keshav Goel, Tarun Sharma, Sujay Deb:
Open Source SoC Design for Low-Cost Micro Weather Station. 173-176 - Aman Ranjan, Megha Megha, Sujay Deb:
Design and Development of VariScan: A Continuous Heart Rate Variability Monitor. 177-180 - Aakash, Lakshay Chauhan, Shubham Sharma, Sujay Deb:
Anomaly Detection from CCTV Camera Feed. 181-184 - Aditya Mathuriya, Deepank Grover, Sujay Deb:
A Hardware-Software Co-Design Approach to Implement PUFs and TRNGs on FPGAs. 185-188 - Harsh Raj Thakur, Prabir Saha:
VLSI Implementation of Edge Detection Chip: A Prospective Design. 189-194 - Priyanka J, Pritam Bhattacharjee, Alak Majumder:
Exploring the Application of Variable Frequency Clock as the Constituent of OCT. 195-199 - Tanisha Gupta, Shubham Jain, Anuj Grover:
0.6 to 1.2V Wide Voltage Range Bandgap Reference Generator in 18nm UTBB-FD-SOI Technology. 199-203 - Mujeev Khan, Ashi Singhal, Mohd Wajid, Abhishek Srivastava:
VLSI Architecture for the Phase Unwrapping Module in Contactless Vibration Sensing for Biomedical Applications. 204-209 - Dipti Sakshi Srivastava, Soumili Kundu, Aritra Senapati, Hemanta Kumar Mondal:
Offline Power Estimation in CMOS VLSI Circuits Using Machine Learning Model. 210-213 - Priyanka J, Ankita Deb, Pritam Bhattacharjee, Alak Majumder:
An Algorithmic Approach of Generating a VFC of Low Average Frequency Ramp. 220-223 - Payali Das, Alak Majumder:
Design of an Operational Transconductance Amplifier-Based Charge Pump for Phase-Locked Loop Applications. 230-234 - Wilfred Kisku, Amandeep Kaur, Deepak Mishra:
Efficient Framework with Sparse Acquisition in CMOS Image Sensors for Low-Power Edge Devices. 235-239 - Bibhudutta Stapathy, Utkarsh Srivastava, Amandeep Kaur:
A Fully Digital Rail-to-Rail Low Power Dynamic Comparator for Smart Devices. 240-245 - Preetha Roselyn J, Prabha Sundaravadivel, V. Vignesh Babu, C. Nithya, D. Devaraj:
LSTM Based Model Predictive Control Approach for Energy Management System in PV-Battery Integrated Microgrid Network. 246-250 - Vipin Kumar Singh, Vijay Pratap Yadav, Tika Ram Pokhrel, Pritam Bhattacharjee, Alak Majumder:
A Method of Variable Frequency Clock Generation. 251-254 - Anirban Sengupta, Vishal Chourasia:
HLS Based Rapid Pareto Front Search of Watermarked Convolutional Layer IP Design. 255-260 - Anushka Ganguly, Arindam Chakraborty, Akash Arun Ambekar, Hemanta Kumar Mondal:
Power, Performance, and Area Optimisation of the RISC-V Processor. 271-274 - Apsana Khatoon, Prasanna Kumar Misra:
A 72 mW, 50 MHz Bandwidth Low-IF CMOS Receiver Front End with Improved Linearity and Dynamic Range. 275-278 - R. Nandagopal, Sumit K. Chatterjee:
Efficient Motion Estimation for Video Compression Using Approximate Arithmetic in Sum of Absolute Difference Computation. 279-283 - Ullas Pai, Naorem Akshaykumar, Deepank Grover, Sujay Deb:
Modular Implementation of Directory-Based Cache Coherence for Multicore Processing. 284-287 - Sohan Pagar, Samhita Patil, Tarun Sharma, Sujay Deb:
Event-Based Vision for Real-Time Speed Detection: A Low Resource Utilization Hardware-Software Co-Design Approach. 288-292 - Tamonash Bhattacharyya, Anurag Mohan Roy, Suddhabrato Ghosh, Prasun Ghosal:
Plant Disease Detection in Smart Agriculture: A Power-aware Edge-AI Implementation on Cortex-A53. 293-298 - Abhishek Yadav, Vyom Kumar Gupta, Binod Kumar:
Harnessing Knowledge-Distillation for Lightweight AI-Implementation on Resource-Constrained Device. 299-302 - Mrityunjay Kumar Chauhan, Prasun Ghosal:
A Hybrid CNN-BiLSTM Neural Network Architecture for Early Prediction of Parkinson's Disease. 303-308 - Serina Nandan, Satota Mandal, Prasun Ghosal:
Stress Detection and Monitoring: A Systematic Review. 309-314 - Prateek Jain, Amit M. Joshi, Saraju P. Mohanty:
iGLU 4.1: An Intelligent Framework of Diabetes Prediction using Glucose-Insulin Values and Physiological Parameters. 315-320 - Gulafsha Bhatti, Yash Agrawal, Vinay Palaparthy:
Electrical Analysis of Stretchable Serpentine Interconnect for Flexible Electronic System. 321-325 - Aparna Nair M. K, Nandhu Sam, Minu A Pillai, Nalesh S, Kala S:
Implementation and Analysis of Sparse DNN on GPU. 332-337 - Tanudeep Ganguly, Rapti Chaudhuri, Suman Deb:
rA*: Re-Planned A* Technique for Point-to-Point Robot Navigation in Dynamic Environments. 338-343 - Sachin Thomas, Aparna Sharma, Ritika Pandey, L. Umanand:
A Novel Monocular Camera-based Modular Reference Generation for Autonomous Vehicles. 344-349 - Ram S. Iyer, Shivam Raj, Vaibhav Mishra, Shivanshu Shrivastava:
Deep Learning-Based Multiuser Classification for Malicious User Detection in 5G and Beyond Cooperative Sensing Systems. 350-353 - Manda Yuktha, Pragati Patel, Vasantha M. H.:
Side Channel Attack on 8051 Microcontroller. 354-359 - Avinash Sharma, Abhishek Dutta, Sujay Deb:
Kalman Filter: A Crucial Step Towards the Development of NavIC. 360-363 - Aniruddha Mallick, Hriya Prasad, Prasenjit Maji, Subhabrata Banerjee, Hemanta Kumar Mondal:
Deep Learning for Brain Tumor Detection with FPGA Pathway. 364-367 - Suman Kalyan Porel, Subhadeep Nag, Aniruddha Chandra, Hemanta Kumar Mondal:
Power, Performance and Area Optimization of Asynchronous FIFO. 368-371 - Riya Maiti, Srijita Saha, Kriti Shrivastava, Kousik Midya, Arnab Chattopadhyay, Ashis Kumar Dhara:
Design of a Portable and Non-Invasive Hemoglobin Measuring Device. 372-375 - Subhadeep Nag, Suman Kalyan Porel, Dyuti Sengupta, Aniruddha Chandra, Hemanta Kumar Mondal:
Consequence of Various Clock Parameters on Power / Timing Analysis for VLSI Circuits. 376-379 - Rahul Chaurasia, Anirban Sengupta:
SecureHD: Designing Low-Cost Reliable and Security Aware Hardware Accelerators During High-Level Synthesis for Computationally Intensive Application Frameworks. 380-383
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last updated on 2025-05-02 23:41 CEST by the dblp team
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