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Hiroyuki Kobayashi
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Publications
- 2022
- [j21]Takashi Toi, Junji Wadatsumi, Hiroyuki Kobayashi, Yutaka Shimizu, Yuji Satoh, Makoto Morimoto, Rui Ito, Mitsuyuki Ashida, Yuta Tsubouchi, Mai Nozawa, Go Urakawa, Jun Deguchi, Ryuichi Fujimoto:
A 25.6-Gb/s Interface Employing PAM-4-Based Four-Channel Multiplexing and Cascaded Clock and Data Recovery Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems. IEEE J. Solid State Circuits 57(5): 1517-1526 (2022) - [c75]Fumihiko Tachibana, Huy Cu Ngo, Go Urakawa, Takashi Toi, Mitsuyuki Ashida, Yuta Tsubouchi, Mai Nozawa, Junji Wadatsumi, Hiroyuki Kobayashi, Jun Deguchi:
A 56-Gb/s PAM4 Transceiver with False-Lock-Aware Locking Scheme for Mueller-Müller CDR. ESSCIRC 2022: 505-508 - 2021
- [j20]Go Urakawa, Hiroyuki Kobayashi, Jun Deguchi, Ryuichi Fujimoto:
A Noise-Canceling Charge Pump for Area Efficient PLL Design. IEICE Trans. Electron. 104-C(10): 625-634 (2021) - 2019
- [c63]Takashi Toi, Junji Wadatsumi, Hiroyuki Kobayashi, Yutaka Shimizu, Yuji Satoh, Makoto Morimoto, Rui Ito, Mitsuyuki Ashida, Yuta Tsubouchi, Mai Nozawa, Go Urakawa, Jun Deguchi:
A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems. ISSCC 2019: 478-480 - 2018
- [j15]Shusuke Kawai, Rui Ito, Kengo Nakata, Yutaka Shimizu, Motoki Nagata, Tomohiko Takeuchi, Hiroyuki Kobayashi, Katsuyuki Ikeuchi, Takayuki Kato, Yosuke Hagiwara, Yuki Fujimura, Kentaro Yoshioka, Shigehito Saigusa, Hiroshi Yoshida, Makoto Arai, Toshiyuki Yamagishi, Hirotsugu Kajihara, Kazuhisa Horiuchi, Hideki Yamada, Tomoya Suzuki, Yuki Ando, Kensuke Nakanishi, Koichiro Ban, Masahiro Sekiya, Yoshimasa Egashira, Tsuguhide Aoki, Kohei Onizuka, Toshiya Mitomo:
An 802.11ax 4 × 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer. IEEE J. Solid State Circuits 53(12): 3688-3699 (2018) - [c59]Shusuke Kawai, Hiromitsu Aoyama, Rui Ito, Yutaka Shimizu, Mitsuyuki Ashida, Asuka Maki, Tomohiko Takeuchi, Hiroyuki Kobayashi, Go Urakawa, Hiroaki Hoshino, Shigehito Saigusa, Kazushi Koyama, Makoto Morita, Ryuichi Nihei, Daisuke Goto, Motoki Nagata, Kengo Nakata, Katsuyuki Ikeuchi, Kentaro Yoshioka, Ryoichi Tachibana, Makoto Arai, Chen Kong Teh, Atsushi Suzuki, Hiroshi Yoshida, Yosuke Hagiwara, Takayuki Kato, Ichiro Seto, Tomoya Horiguchi, Koichiro Ban, Kyosuke Takahashi, Hirotsugu Kajihara, Toshiyuki Yamagishi, Yuki Fujimura, Kazuhisa Horiuchi, Katsuya Nonin, Kengo Kurose, Hideki Yamada, Kentaro Taniguchi, Masahiro Sekiya, Takeshi Tomizawa, Daisuke Taki, Masaaki Ikuta, Tomoya Suzuki, Yuki Ando, Daisuke Yashima, Takahisa Kaihotsu, Hiroki Mori, Kensuke Nakanishi, Takeshi Kumagaya, Yasuo Unekawa, Tsuguhide Aoki, Kohei Onizuka, Toshiya Mitomo:
An 802.11ax 4×4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer. ISSCC 2018: 442-444 - 2017
- [c55]Atsushi Shirane, Shusuke Kawai, Hiromitsu Aoyama, Rui Ito, Toshiya Mitomo, Hiroyuki Kobayashi, Hiroshi Yoshida, Hideaki Majima, Ryuichi Fujimoto, Hiroshi Tsurumi:
A low voltage 0.8V RF receiver in 28nm CMOS for 5GHz WLAN. ESSCIRC 2017: 328-331 - 2014
- [j12]Daisuke Miyashita, Ryo Yamaki, Kazunori Hashiyoshi, Hiroyuki Kobayashi, Shouhei Kousai, Yukihito Oowaki, Yasuo Unekawa:
An LDPC Decoder With Time-Domain Analog and Digital Mixed-Signal Processing. IEEE J. Solid State Circuits 49(1): 73-83 (2014) - [c43]Hiroshi Tsutsui, Yoshihiko Murashima, Naoki Honma, Hiroyuki Kobayashi:
Development of multichannel soft tactile sensors having fingerprint structure. EMBC 2014: 2496-2499 - [c39]Yuji Satoh, Hiroyuki Kobayashi, Takeshi Miyaba, Shouhei Kousai:
A 2.9mW, +/- 85ppm accuracy reference clock generator based on RC oscillator with on-chip temperature calibration. VLSIC 2014: 1-2 - 2013
- [c37]Yusuke Niki, Daisuke Miyashita, Hiroyuki Kobayashi, Shouhei Kousai:
A supply-noise-rejection technique in ADPLL with noise-cancelling current source. ESSCIRC 2013: 45-48 - [c35]Daisuke Miyashita, Ryo Yamaki, Kazunori Hashiyoshi, Hiroyuki Kobayashi, Shouhei Kousai, Yukihito Oowaki, Yasuo Unekawa:
A 10.4pJ/b (32, 8) LDPC decoder with time-domain analog and digital mixed-signal processing. ISSCC 2013: 420-421 - 2012
- [j11]Daisuke Miyashita, Hiroyuki Kobayashi, Jun Deguchi, Shouhei Kousai, Mototsugu Hamada, Ryuichi Fujimoto:
A-104 dBc/Hz In-Band Phase Noise 3 GHz All Digital PLL with Phase Interpolation Based Hierarchical Time to Digital Converter. IEICE Trans. Electron. 95-C(6): 1008-1016 (2012) - 2011
- [c26]Hiroyuki Kobayashi, Shouhei Kousai, Yoshiaki Yoshihara, Mototsugu Hamada:
An all-digital 8-DPSK polar transmitter with second-order approximation scheme and phase rotation-constant digital PA for bluetooth EDR in 65nm CMOS. ISSCC 2011: 174-176 - 2010
- [j9]Kenichi Agawa, Shin-ichiro Ishizuka, Hideaki Majima, Hiroyuki Kobayashi, Masayuki Koizumi, Takeshi Nagano, Makoto Arai, Yutaka Shimizu, Asuka Maki, Go Urakawa, Tadashi Terada, Nobuyuki Itoh, Mototsugu Hamada, Fumie Fujii, Tadamasa Kato, Sadayuki Yoshitomi, Nobuaki Otsuka:
A 0.13 µm CMOS Bluetooth EDR Transceiver with High Sensitivity over Wide Temperature Range and Immunity to Process Variation. IEICE Trans. Electron. 93-C(6): 803-811 (2010) - 2007
- [j8]Hiroyuki Kobayashi, Nobuto Ono, Takashi Sato, Jiro Iwai, Hidenari Nakashima, Takaaki Okumura, Masanori Hashimoto:
Proposal of Metrics for SSTA Accuracy Evaluation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(4): 808-814 (2007) - [c19]Kenichi Agawa, Hideaki Majima, Hiroyuki Kobayashi, Masayuki Koizumi, Shin-ichiro Ishizuka, Takeshi Nagano, Makoto Arai, Yutaka Shimizu, Go Urakawa, Nobuyuki Itoh, Mototsugu Hamada, Nobuaki Otsuka:
A -90 dBm sensitivity 0.13 μm CMOS bluetooth transceiver operating in wide temperature range. CICC 2007: 655-658 - 2006
- [j6]Koutaro Hachiya, Hiroyuki Kobayashi, Takaaki Okumura, Takashi Sato, Hiroki Oka:
A Method to Derive SSO Design Rule Considering Jitter Constraint. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(4): 865-872 (2006) - [j5]Toshiki Kanamoto, Shigekiyo Akutsu, Tamiyo Nakabayashi, Takahiro Ichinomiya, Koutaro Hachiya, Atsushi Kurokawa, Hiroshi Ishikawa, Sakae Muromoto, Hiroyuki Kobayashi, Masanori Hashimoto:
Impact of Intrinsic Parasitic Extraction Errors on Timing and Noise Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(12): 3666-3670 (2006) - 2005
- [j3]Toru Tanzawa, Kenichi Agawa, Hiroyuki Shibayama, Ryota Terauchi, Katsumi Hisano, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Toru Takayama, Masayuki Koizumi, Fumitoshi Hatori:
A 2.4-GHz Temperature-Compensated CMOS LC-VCO for Low Frequency Drift Low-Power Direct-Modulation GFSK Transmitters. IEICE Trans. Electron. 88-C(4): 490-495 (2005) - [c14]Daisuke Miyashita, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Kenichi Agawa, Mototsugu Hamada:
A phase noise minimization of CMOS VCOs over wide tuning range and large PVT variations. CICC 2005: 583-586 - 2004
- [c10]Toru Tanzawa, Hiroyuki Shibayama, Ryota Terauchi, Katsumi Hisano, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Toru Takayama, Kenichi Agawa, Masayuki Koizumi, Fumitoshi Hatori:
A temperature-compensated CMOS LC-VCO enabling the direct modulation architecture in 2.4GHz GFSK transmitter. CICC 2004: 273-276 - 2003
- [c9]Takashi Sato, Toshiki Kanamoto, Atsushi Kurokawa, Yoshiyuki Kawakami, Hiroki Oka, Tomoyasu Kitaura, Hiroyuki Kobayashi, Masanori Hashimoto:
Accurate prediction of the impact of on-chip inductance on interconnect delay using electrical and physical parameter-based RSF. ASP-DAC 2003: 149-155 - 2002
- [j2]Hiroshi Mizuno, Hiroyuki Kobayashi, Takao Onoye, Isao Shirakawa:
Performance Estimation at Architecture Level for Embedded Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12): 2636-2644 (2002)
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