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2010 – 2019
- 2013
[j1]Daesung Lee, W. Scott Lee, Chen Chen, Farzan Fallah, J. Provine, Soogine Chong, John Watkins, Roger T. Howe
, H.-S. Philip Wong, Subhasish Mitra:
Combinational Logic Design Using Six-Terminal NEM Relays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(5): 653-666 (2013)- 2012
- [c4]Chen Chen, W. Scott Lee, J. Provine, Soogine Chong, Roozbeh Parsa, Daesung Lee, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Nano-Electro-Mechanical (NEM) relays and their application to FPGA routing. ASP-DAC 2012: 639 - [c3]Chen Chen, W. Scott Lee, Roozbeh Parsa, Soogine Chong, J. Provine, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Nano-Electro-Mechanical relays for FPGA routing: Experimental demonstration and a design technique. DATE 2012: 1361-1366 - 2010
- [c2]Chen Chen, Roozbeh Parsa, Nishant Patil, Soogine Chong, Kerem Akarvardar, J. Provine, David Lewis, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Efficient FPGAs using nanoelectromechanical relays. FPGA 2010: 273-282
2000 – 2009
- 2009
- [c1]Soogine Chong, Kerem Akarvardar, Roozbeh Parsa, Jun-Bo Yoon, Roger T. Howe, Subhasish Mitra, H.-S. Philip Wong:
Nanoelectromechanical (NEM) relays integrated with CMOS SRAM for improved stability and low leakage. ICCAD 2009: 478-484
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