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Osamu Watanabe 0003
Person information
- affiliation: Toshiba, Kawasaki, Japan
Other persons with the same name
- Osamu Watanabe — disambiguation page
- Osamu Watanabe 0001
— Tokyo Institute of Technology, Japan
- Osamu Watanabe 0002 — Takushoku University, Japan
- Osamu Watanabe 0004 — Muroran Institute of Technology, Hokkaido, Japan
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2010 – 2019
- 2014
- [c7]Shigehito Saigusa, Toshiya Mitomo, Hidenori Okuni, Masahiro Hosoya, Akihide Sai, Shusuke Kawai, Tong Wang, Masanori Furuta, Kei Shiraishi, Koichiro Ban, Seiichiro Horikawa, Tomoya Tandai, Ryoko Matsuo, Takeshi Tomizawa, Hiroaki Hoshino, Junya Matsuno, Yukako Tsutsumi, Ryoichi Tachibana, Osamu Watanabe, Tetsuro Itakura:
20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication. ISSCC 2014: 348-349 - 2013
- [j10]Tong Wang, Toshiya Mitomo, Naoko Ono, Shigehito Saigusa, Osamu Watanabe:
A 60 GHz Power Amplifier with 10 GHz 1-dB Bandwidth and 13.6% PAE in 65 nm CMOS. IEICE Trans. Electron. 96-C(6): 796-803 (2013) - 2012
- [j9]Kohei Onizuka, Hiroaki Ishihara, Masahiro Hosoya, Shigehito Saigusa, Osamu Watanabe, Shoji Otaka:
A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion. IEEE J. Solid State Circuits 47(8): 1820-1827 (2012) - [c6]Akihide Sai, Yuka Kobayashi, Shigehito Saigusa, Osamu Watanabe, Tetsuro Itakura:
A digitally stabilized type-III PLL using ring VCO with 1.01psrms integrated jitter in 65nm CMOS. ISSCC 2012: 248-250 - 2011
- [c5]Kohei Onizuka, Hiroaki Ishihara, Masahiro Hosoya, Shigehito Saigusa, Osamu Watanabe, Shoji Otaka:
A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller. CICC 2011: 1-4 - [c4]Hiroki Sakurai, Yuka Kobayashi, Toshiya Mitomo, Osamu Watanabe, Shoji Otaka:
A 1.5GHz-modulation-range 10ms-modulation-period 180kHzrms-frequency-error 26MHz-reference mixed-mode FMCW synthesizer for mm-wave radar application. ISSCC 2011: 292-294 - 2010
- [j8]Toshiya Mitomo, Naoko Ono, Hiroaki Hoshino, Yoshiaki Yoshihara, Osamu Watanabe, Ichiro Seto:
A 77 GHz 90 nm CMOS Transceiver for FMCW Radar Applications. IEEE J. Solid State Circuits 45(4): 928-937 (2010) - [j7]Hiroaki Ishihara, Masahiro Hosoya, Shoji Otaka, Osamu Watanabe:
A 10-MHz Signal Bandwidth Cartesian Loop Transmitter Capable of Off-Chip PA Linearization. IEEE J. Solid State Circuits 45(12): 2785-2793 (2010) - [c3]Masahiro Hosoya, Toshiya Mitomo, Osamu Watanabe:
A 900-MHz bandwidth analog baseband circuit with 1-dB step and 30-dB gain dynamic range. ESSCIRC 2010: 466-469 - [c2]Hiroaki Ishihara, Masahiro Hosoya, Shoji Otaka, Osamu Watanabe:
A 10MHz signal bandwidth Cartesian-loop transmitter capable of off-chip PA linearization. ISSCC 2010: 66-67
2000 – 2009
- 2008
- [j6]Osamu Watanabe, Rui Ito, Toshiya Mitomo, Shigehito Saigusa, Tadashi Arai, Takehiko Toyoda:
A Triple-Band WCDMA Direct Conversion Receiver IC with Reduced Number of Off-Chip Components and Digital Baseband Control Signals. IEICE Trans. Electron. 91-C(6): 837-843 (2008) - 2007
- [j5]Toshiya Mitomo, Osamu Watanabe, Ryuichi Fujimoto, Shunji Kawaguchi:
A Quadrature Demodulator for WCDMA Receiver Using Common-Base Input Stage with Robustness to Transmitter Leakage. IEICE Trans. Electron. 90-C(6): 1241-1246 (2007) - [j4]Osamu Watanabe, Rui Ito, Shigehito Saigusa, Tadashi Arai, Tetsuro Itakura:
A Fast fc Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems. IEICE Trans. Electron. 90-C(6): 1247-1252 (2007) - 2006
- [c1]Toshiya Mitomo, Osamu Watanabe, Ryuichi Fujimoto, Shunji Kawaguchi:
A Quadrature Demodulator for WCDMA Receiver Using Common-Base Input Stage with Robustness to Transmitter Leakage. CICC 2006: 373-376 - 2005
- [j3]Toshiya Mitomo, Osamu Watanabe, Shoji Otaka, Ryuichi Fujimoto, Shunji Kawaguchi:
A Low LO Leakage and Low Power LO Buffer for Direct-Conversion Quadrature Demodulator. IEICE Trans. Electron. 88-C(6): 1212-1217 (2005) - 2003
- [j2]Takafumi Yamaji, Daisuke Kurose, Osamu Watanabe, Shuichi Obayashi
, Tetsuro Itakura:
A four-input beam-forming downconverter for adaptive antennas. IEEE J. Solid State Circuits 38(10): 1619-1625 (2003) - 2002
- [j1]Osamu Watanabe, Takafumi Yamaji, Tetsuro Itakura, Ichiro Hattori:
A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(2): 286-292 (2002)
Coauthor Index
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