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Jotham Vaddaboina Manoranjan

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Conference and Workshop Papers

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2016
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Jotham Vaddaboina Manoranjan, Kenneth S. Stevens:
Qualifying Relative Timing Constraints for Asynchronous Circuits. ASYNC 2016: 91-98
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Jotham Vaddaboina Manoranjan, Kenneth S. Stevens:
Reconfigurable circuit for implementation of family of 4-phase latch protocols. FPL 2016: 1-4
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Jotham Vaddaboina Manoranjan, Solomon Surya Tej Mano Sajjan, Vivek B. Gujari, Kenneth S. Stevens:
Design of a multi-style and multi-frequency FPGA. VLSI-SoC 2016: 1-6
2014
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Jotham Vaddaboina Manoranjan, Kenneth S. Stevens:
An a-FPGA architecture for relative timing based asynchronous designs. ReConFig 2014: 1-6

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