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2020 – today
- 2021
[c8]Liangxiao Tang, Weixin Gai, Chih-Kong Ken Yang, Bingyi Ye, Congcong Chen:
A 25Gb/s 185mW PAM-4 Receiver with 4-Tap Adaptive DFE and Sampling Clock Optimization in 55nm CMOS. ISCAS 2021: 1-4
2010 – 2019
- 2018
- [c7]Linqi Shi, Weixin Gai, Jichao Huang, Liangxiao Tang, Xiao Xiang:
A Sub-ps Integrated-Jitter 10 GHz ADPLL with Fractional Capacitor. ISCAS 2018: 1-4 - [c6]Linqi Shi, Weixin Gai, Xiaoting Zhi, Liangxiao Tang, Xiao Xiang:
An 8.52-11.34 GHz 0.34° Phase Error Quadrature Clock Generator with Time-Voltage-Time Convertor. ISCAS 2018: 1-4 - [c5]Liangxiao Tang, Weixin Gai, Linqi Shi, Xiao Xiang, Kai Sheng
, Ai He:
A 32Gb/s 133mW PAM-4 transceiver with DFE based on adaptive clock phase and threshold voltage in 65nm CMOS. ISSCC 2018: 114-116 - 2017
- [c4]Liangxiao Tang, Weixin Gai, Linqi Shi, Xiao Xiang:
A 40 Gb/s 74.9 mW PAM4 receiver with novel clock and data recovery. ISCAS 2017: 1-4 - 2016
- [c3]Liangxiao Tang, Weixin Gai, Linqi Shi:
PAM4 receiver with adaptive threshold voltage and adaptive decision feedback equalizer. ISCAS 2016: 2246-2249 - [c2]Shihao Li, Weixin Gai, Xiao Xiang, Liangxiao Tang, Jichao Huang, Tong Zhao, Xiaoting Zhi:
A 1.27mW 20Gbps 1: 16 DEMUX with a symmetrical-edge-delay sense amplifier. ISCAS 2016: 2419-2422 - 2015
- [c1]Jincai Liu, Weixin Gai, Liangxiao Tang:
A novel 6-Gbps half-rate SST transmitter with impedance calibration and adjustable pre-emphasis. ISCAS 2015: 341-344
Coauthor Index
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