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ORCIDISCAS 2021: Daegu, South Korea
- IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021. IEEE 2021, ISBN 978-1-7281-9201-7
- Samalika Lakmali Perera, Ying Xu, André van Schaik
, Runchun Wang:
Live Demonstration: An FPGA-Based Emulation of an Event-Based Vision Sensor Using Commercially Available Camera. 1 - Rashid Ali, You Wang, Haoyuan Ma, Zhengyi Hou, Deming Zhang, Erya Deng, Weisheng Zhao:
A Reconfigurable Arbiter PUF Based on STT-MRAM. 1-5 - Syed Muhammad Abubakar, Yue Yin, Songyao Tan, Hanjun Jiang, Zhihua Wang, Seng-Pan U, Wen Jia:
A 2.52 μΑ Wearable Single Lead Ternary Neural Network Based Cardiac Arrhythmia Detection Processor. 1-4 - Taehak Kim, Jaehoon Jeong, Seungmin Woo, Jeonggyu Yang, Hyunwoo Kim, Ahyeon Nam, Changdong Lee, Jinmin Seo, Minji Kim, Siwon Ryu, Yoonju Oh, Taigon Song:
NS3K: A 3nm Nanosheet FET Library for VLSI Prediction in Advanced Nodes. 1-5 - Wenbin He, Fan Ye, Junyan Ren:
An 11-Bit 500 MS/s Two-Step SAR ADC with Non-Attenuated Passive Residue Transfer. 1-4 - Shiying Wang, Ziyang Kang, Lei Wang, Shiming Li, Lianhua Qu:
A Hardware Aware Liquid State Machine Generation Framework. 1-5 - Carlos Salazar-García, Ronny García-Ramírez, Renato Rimolo-Donadio, Christos Strydis, Alfonso Chacón-Rodríguez:
PlasticNet+: Extending Multi-FPGA Interconnect Architecture via Gigabit Transceivers. 1-5 - Woorham Bae:
State-of-the-Art Circuit Techniques for Low-Jitter Phase-Locked Loops: Advanced Performance Benchmark FOM Based on an Extensive Survey. 1-5 - Mahmood A. Mohammed, Gordon W. Roberts:
Conventional CMOS OTAs Driving nF-Range Capacitive Loads. 1-5 - Ziying Ni, Dur-e-Shahwar Kundi, Máire O'Neill, Weiqiang Liu:
High-Performance Systolic Array Montgomery Multiplier for SIKE. 1-5 - Danyang Zhu, Jing Tian, Zhongfeng Wang:
Low-Latency Architecture for the Parallel Extended GCD Algorithm of Large Numbers. 1-5 - Debjyoti Bhattacharjee, Nathan Laubeuf, Stefan Cosemans, Ioannis A. Papistas, Arindam Mallik, Peter Debacker, Myung Hee Na, Diederik Verkest:
Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration. 1-5 - Bo Zhang, Lei Zhang, Mojun Wu, Yan Wang:
Dynamic Gesture Recognition Based on RF Sensor and AE-LSTM Neural Network. 1-5 - Gabriel Nobert, Abdul Hafiz Alameh, Nam Ly, Nicolas G. Constantin, Yves Blaquière:
Towards an LTCC SiP for Control System in Safety-Critical Applications. 1-5 - Yuchen Li, Siming Zuo, Jacob Thompson, Lisa Ranford-Cartwright, Nosrat Mirzai, Hadi Heidari:
Magnetoresistance Sensor with Analog Frontend for Lab-on-Chip Malaria Parasite Detection. 1-5 - Ilias Bournias, Roselyne Chotin, Lionel Lacassagne:
FPGA Acceleration of the Horn and Schunck Hierarchical Algorithm. 1-5 - Chen Xu, Xiaolei Su, Zhengkun Shen, Dong Wang, Yi Tan, Zexue Liu, Hailong Jiao, Junhua Liu, Huailin Liao:
A Hybrid Digital Transmitter Architecture for High- Efficiency and High-Speed Applications. 1-5 - Markus Stadelmayer, Tim Schumacher, Thomas Faseth, Harald Pretl:
A Low-Power Edge-Combining Transmitter Using Quadrature Signals for FSK Modulation. 1-5 - Xingwu Ji, Zheng Gong, Ruihang Miao, Wuyang Xue, Rendong Ying:
Monocular Semantic Mapping Based on 3D Cuboids Tracking. 1-5 - Thang Xuan Pham, Hanho Lee:
High-Efficient Nonbinary LDPC Decoder with Early Layer Decoding Schedule. 1-4 - Katsuki Tokano, Wenqi Zhu, Tatsuki Osato, Kien Nguyen, Hiroo Sekiya:
Optimal Design of 6.78 MHz Wireless Power Transfer System for Robot Arm. 1-5 - Hyeji Kim, Jaehoon Chung, Kyoung-Seon Shin, Chun-Gi Lyuh, Hyun-Mi Kim, Chan Kim, Yong Cheol Peter Cho, Jeongmin Yang, Je-Seok Ham, Minseok Choi, Jinho Han, Youngsu Kwon:
Live Demonstration: A Neural Processor for AI Acceleration. 1 - Devon Janke, David V. Anderson:
Best Practices for Designing and Training Neural Networks Subjected to Random Variations. 1-5 - Chae-Hyun Kim, Hyung-Min Lee:
A 2.45-GHz RF Energy Harvester with On-Chip 8-VCR SC Booster for IoT Devices. 1-5 - Fupeng Chen, Xinzhe Liu, Heng Yu, Yajun Ha:
CLIF: Cross-Layer Information Fusion for Stereo Matching and its Hardware Implementation. 1-5 - Chien-Chih Huang, Jyun-Neng Ji, Ming-Der Shieh:
On Compare-and-Swap Optimization for Fully Homomorphic Encrypted Data. 1-4 - Jialin Liu, David J. Allstot:
Compressed Sensing Σ-Δ Modulators and Recovery Algorithm for Multi-Channel Bio-Signal Acquisition. 1-4 - Corey Lammie, Wei Xiang, Mostafa Rahimi Azghadi:
Towards Memristive Deep Learning Systems for Real-Time Mobile Epileptic Seizure Prediction. 1-5 - Xiaofan Li, Melpomeni Kalofonou:
Predicting Cancer Drug Response Using an Adapted Deep Neural Network Model. 1-5 - Jayol Lee, Youngseok Baek, Iksoo Eo, Bontae Koo:
A Ka-Band FMCW PLL Synthesizer with 8.5-GHz Bandwidth for High-Precision High-Resolution Sub-mmWave Radar Sensing. 1-5 - Taiyu Zhu, Lei Kuang, Kezhi Li, Junming Zeng, Pau Herrero, Pantelis Georgiou:
Blood Glucose Prediction in Type 1 Diabetes Using Deep Learning on the Edge. 1-5 - Yunlu Wang, Menghan Hu, Chaohua Yang, Na Li, Jian Zhang, Qingli Li, Guangtao Zhai, Simon X. Yang:
Low-Cost and Unobtrusive Respiratory Condition Monitoring Based on Raspberry Pi and Recurrent Neural Network. 1-5 - Sangwoo Hwang, Junghyup Lee, Jaeha Kung:
Adaptive Input-to-Neuron Interlink Development in Training of Spike-Based Liquid State Machines. 1-5 - Bibhudutta Satapathy, Amandeep Kaur:
A High Speed, Low Energy Comparator Based on Current Recycling Approach. 1-5 - Shiyi Jin, Jin-Gyun Chung, Yi-Nan Xu:
Signature-Based Intrusion Detection System (IDS) for In-Vehicle CAN Bus Network. 1-5 - Saddam Husain, Ahmad Khusro, Mohammad S. Hashmi, Galymzhan Nauryzbayev, Muhammad Akmal Chaudhary:
Demonstration of CAD Deployability for GPR Based Small-Signal Modelling of GaN HEMT. 1-5 - Min Chen, Yutong Zhao, Nuo Xu, Fan Ye, Junyan Ren:
A Partially Binarized and Fixed Neural Network Based Calibrator for SAR-Pipelined ADCs Achieving 95.0-dB SFDR. 1-4 - Shanzhe Yu, Xueyou Shi, Yacong Zhang, Guangyi Chen, Siyuan Ye, Wengao Lu, Zhongjian Chen:
A Readout Circuit with Current-Compensation-Based Extended-Counting ADC for 1024×768 Diode Uncooled Infrared Imagers. 1-5 - Haixian Wen, Junyuan Fang, Jiajing Wu, Zibin Zheng:
Transaction-Based Hidden Strategies against General Phishing Detection Framework on Ethereum. 1-5 - Aurélien Alacchi, Edouard Giacomin, Xifan Tang, Pierre-Emmanuel Gaillardon:
Smart-Redundancy: An Alternative SEU/SET Mitigation Method for FPGAs. 1-5 - Ramith Hettiarachchi, Udith Haputhanthri, Kithmini Herath, Hasindu Kariyawasam, Shehan Munasinghe, Kithmin Wickramasinghe, Duminda Samarasinghe, Anjula C. De Silva, Chamira U. S. Edussooriya:
A Novel Transfer Learning-Based Approach for Screening Pre-Existing Heart Diseases Using Synchronized ECG Signals and Heart Sounds. 1-5 - Inho Park, Jinseok Oh, Chulwoo Kim:
A Power Management System Based on Adaptive Low-Dropout Voltage Regulator with Optimal Reference Pre-Compensation Technique. 1-4 - Hongchang Qiao, Chenchang Zhan, Quan Pan, Yutian Chen, Ning Zhang:
An Area-Efficient Low Quiescent Current Output Capacitor-Less LDO with Fast Transient Response. 1-4 - Tun-Yen Liao, Hsin-Shu Chen, Wen-Jong Wu:
Reconfigurable Switched-Capacitor DC-DC Converter with Adaptive Switch Modulation and Frequency Scaling Techniques. 1-4 - Qiao Cai, Yuxin Ji, Ce Ma, Xiaocui Li, Ting Zhou, Jian Zhao, Yongfu Li:
An Ultra-Low-Voltage Energy-Efficient Dynamic Fully-Regenerative Latch-Based Level-Shifter Circuit with Tunnel-FET & FinFET Devices. 1-5 - Ckristian Duran, Elkim Roa:
Routing-Aware Standard Cell Placement Algorithm Applying Boolean Satisfiability. 1-5 - Chua-Chin Wang, Chien-Ping Kuo:
67.5-fJ Per Access 1-kb SRAM Using 40-nm Logic CMOS Process. 1-4 - Khoirom Johnson Singh, Anand Bulusu, Sudeb Dasgupta:
Harnessing Maximum Negative Capacitance Signature Voltage Window in P(VDF-TrFE) Gate Stack. 1-5 - Daohuai Jiang, Hengrong Lan, Yifei Xu, Yujie Wang, Feng Gao, Fei Gao:
Size-Adjustable Photoacoustic Tomography System with Sectorial Ultrasonic Transducer Array. 1-5 - Masahiro Kawano, Tran Thi Thao Nguyen, Yuhei Nagao, Leonardo Lanante, Masayuki Kurosaki, Hiroshi Ochi:
Live Demonstration: Null Beamforming to Self in Cooperative MIMO for Full-Duplex System. 1 - Milad Zamani, Margherita Ronchini, Hai Au Huynh, Hooman Farkhani, Farshad Moradi:
Flexible Energy-Efficient Implementation of Adaptive Spiking Encoder for Neuromorphic Processors. 1-5 - Sunwha Koh, Younggwang Jung, Daijoon Hyun, Youngsoo Shin:
Routability Optimization for Extreme Aspect Ratio Design Using Convolutional Neural Network. 1-4 - Arshad Khan, Shawkat Ali, Saleem Khan, Amine Bermak:
Rapid Fabrication of Soft Strain Sensors by Multi-Nozzle Electrohydrodynamic Inkjet Printing for Wearable Electronics. 1-4 - Md Toufikul Islam, Semih Aslan:
Leak Detection and Location Pinpointing in Water Pipeline Systems Using a Wireless Sensor Network. 1-7 - Laysson Oliveira Luz, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar P. Vilela Neto:
NMLib: A Nanomagnetic Logic Standard Cell Library. 1-5 - Peta Guruprakashkumar, Siddharth R. K., Nithin Kumar Y. B., Vasantha M. H., Edoardo Bonizzoni:
A 1-V, 5-Bit, 180-µW, Differential Pulse Position Modulation ADC in 65-nm CMOS Process. 1-5 - Jialiang Tang, Mingjin Liu, Ning Jiang, Huan Cai, Wenxin Yu, Jinjia Zhou:
Data-Free Network Pruning for Model Compression. 1-5 - B. Dinesh Kumar, Hitesh Shrimali, Nagarjuna Nallam:
A Low-Power Quadrature LC-Oscillator Using Core-and-Coupling Current-Reuse. 1-5 - Mohammad Usaid Abbasi:
A Wearable EEG Amplifier Using a Novel Teraohm Low-Distortion Tunable Hybrid Pseudo-Resistor. 1-5 - Jaewon Lee, Gain Kim, Jinho Park, Hyeon-Min Bae:
Link Bit-Error-Rate Requirement Analysis for Deep Neural Network Accelerators. 1-5 - Xiaobai Chen, Weibei Fan, Yong Xie, Fu Xiao:
A 2.44 Tops/W Heterogeneous DCNN Inference/Training Processor for Embedded System. 1-5 - Jongkil Hyun, Junghwan Kim, Cheol-Ho Choi, Byungin Moon:
Hardware Architecture of a Haar Classifier Based Face Detection System Using a Skip Scheme. 1-4 - Hanrui Zhang, Nannan Li, Zihao Jiao, Jie Zhang, Xiaofei Wang, Hong Zhang:
A 1st-Order Passive Noise-Shaping SAR ADC with Improved NTF Assisted by Comparator Gain Calibration. 1-5 - Rameesha Qaiser, Muhammad Rizwan Khan, Wala Saadeh:
An Impedance Measurement SoC with Highly Digital Magnitude and Phase-to-Digital Converter. 1-5 - Jie Chen, Xiang Li:
A Minimal Memory Game-Based Distributed Algorithm to Vertex Cover of Networks. 1-5 - Hing-Mo Lam, Silin Lu, Hezi Qiu, Hailong Jiao, Min Zhang, Shengdong Zhang:
Segmented Reconfigurable Cyclic Shifter for QC-LDPC Decoder. 1-5 - Si Wang, Chip-Hong Chang:
Fingerprinting Deep Neural Networks - a DeepFool Approach. 1-5 - Zhanyuan Cai, Wei Gao:
Efficient Fast Algorithm and Parallel Hardware Architecture for Intra Prediction of AVS3. 1-5 - Richelle L. Smith, Thomas H. Lee:
Modeling of Injection Locking in Neurons for Neuromorphic and Biomedical Systems. 1-5 - Jiaqi Wang, Alexander Serb, Christos Papavassiliou, Themistoklis Prodromakis:
Accounting for Memristor I-V Non-Linearity in Low Power Memristive Amplifiers. 1-5 - Ibrahim M. Elfadel:
Convergent Time-Stepping Schemes for Analog ReLU Networks. 1-5 - Ming Yang, Shayan Shahramian, Henry Wong, Peter Krotnev, Anthony Chan Carusone:
Pre-FEC and Post-FEC BER as Criteria for Optimizing Wireline Transceivers. 1-5 - Huiping Zhuang, Zhiping Lin, Kar-Ann Toh:
Training Multilayer Neural Networks Analytically Using Kernel Projection. 1-5 - Kohji Hosokawa, Pritish Narayanan, Stefano Ambrogio, Hsinyu Tsai, Charles Mackin, Andrea Fasoli, Alexander M. Friz, An Chen, Jose Luquin, Katherine Spoon, Geoffrey W. Burr, Scott C. Lewis:
Circuit Techniques for Efficient Acceleration of Deep Neural Network Inference with Analog-AI (Invited). 1-5 - Ahmad Reza Danesh, Payam Heydari:
A Comprehensive Analysis of Charge-Pump-Based Multi-Stage Multi-Output DC-DC Converters. 1-5 - Oscal Tzyh-Chiang Chen, Yu Cheng Zhang, Yu-Xuan Chang, Yu-Lung Chang:
Iterative Multiple-Path One-Shot NAS for the Optimized Performance. 1-5 - Balaji Vijayakumar, Janakiraman Viraraghavan:
An Area-Efficient Word-Line Pitch-Aligned 8T SRAM Compatible Digital-to-Analog Converter. 1-5 - N. Watanabe, M. Ikeda:
ToF Image Sensor with Pulse-Frequency-Modulation Pixel for In-Pixel Code Discrimination. 1-5 - Yubo Shi, Meiqi Wang, Siyi Chen, Jinghe Wei, Zhongfeng Wang:
Transform-Based Feature Map Compression for CNN Inference. 1-5 - Markus Robens, Christian Grewing, Michael Schiek, Stefan van Waasen:
Effective Low-Pass Filter Function Due to the Use of a Comb Filter and Virtual Oversampling. 1-5 - Yue Zheng, Chip-Hong Chang:
Secure Mutual Authentication and Key-Exchange Protocol between PUF-Embedded IoT Endpoints. 1-5 - Xuesong Chen, Hazem Elgabra, Chih-Hung Chen, Jonathan Baugh, Lan Wei:
Estimation of MOSFET Channel Noise and Noise Performance of CMOS LNAs at Cryogenic Temperatures. 1-5 - Mounika Akula, Ajinkya Kale, Johannes Sturm:
A Double-Balanced N-Phase Passive 3 × Sub-Harmonic Down-Conversion Mixer. 1-5 - Matthias Eberlein, Harald Pretl:
A Current-Mode Temperature Sensor with a ±1.56 °C Raw Error and Duty-Cycle Output in 16nm FinFET. 1-5 - Ria Rashid, Nandakumar Nambath:
Hybrid Particle Swarm Optimization Algorithm for Area Minimization in 65 nm Technology. 1-5 - Sayed Elgendy, Eslam Yahya Tawfik:
Impact of Physical Design on PUF Behavior: A Statistical Study. 1-5 - Ujjawal Chugh, Arnab Mitra, Ankur Deshwal, N. P. Swaroop, Aditi Saluja, Seungwon Lee, Joonho Song:
An Automated Approach to Accelerate DNNs on Edge Devices. 1-5 - Sachin Maheshwari, Alexander Serb, Christos Papavassiliou, Themistoklis Prodromakis:
An Adiabatic Regenerative Capacitive Artificial Neuron. 1-5 - Ayush Jain, Ziqi Zhou, Ujjwal Guin:
Survey of Recent Developments for Hardware Trojan Detection. 1-5 - Tianyuan Tang, Ping Luo, Chengda Deng, Bo Zhang:
A Novel Ladder Control Assisted Startup for Primary Side Regulated Flyback Converter. 1-4 - Chuhui Wang, Yanhang Chen, Shaochen Xi, Jianping Guo, Junrui Liang:
An Integrated Piezoelectric Energy Harvesting Interface Circuit with Adaptive S3BF Control. 1-4 - Van Ha Nguyen, Abdul Hafiz Alameh, Nam Ly, Yves Blaquière, Glenn E. R. Cowan:
A Novel Minimum-Phase Dual-Inductor Hybrid Boost Converter with PWM Voltage-Mode Controller. 1-5 - Yajun Mao, Qian Zhao, Rongxuan Song, Zhihai Rong, Jiasheng Hao:
Timescales Diversity Induces Influencers to Persist Cooperation on Scale-Free Networks. 1-5 - Mandana Ardeshir Tanha, Farnaz Fahimi Hanzaee, Richard H. Bayford, Andreas Demosthenous:
RF Wireless Power Transfer for EIT Neonate Lung Function Monitoring. 1-5 - Luca Bertaccini, Matteo Perotti, Stefan Mach, Pasquale Davide Schiavone, Florian Zaruba, Luca Benini:
Tiny-FPU: Low-Cost Floating-Point Support for Small RISC-V MCU Cores. 1-5 - Chao Wang, Zhaohao Wang, Youguang Zhang, Weisheng Zhao:
Computing-in-Memory Paradigm Based on STT-MRAM with Synergetic Read/Write-Like Modes. 1-5 - Michael Canesche, Lucas Bragança, Omar Paranaiba Vilela Neto, José Augusto Miranda Nacif, Ricardo S. Ferreira:
Google Colab CAD4U: Hands-On Cloud Laboratories for Digital Design. 1-5 - Jordi Bonet-Dalmau, Pere Palà-Schönwälder, F. Xavier Moncunill-Geniz:
SNR Measurement of Superregenerative Oscillators. 1-5 - Cesar G. Chaves, Johanna Sepúlveda, Thomas Hollstein:
Lightweight Monitoring Scheme for Flooding DoS Attack Detection in Multi-Tenant MPSoCs. 1-5 - Miguel de Prado, Manuele Rusci, Romain Donze, Alessandro Capotondi, Serge Monnerat, Luca Benini, Nuria Pazos:
Robustifying the Deployment of tinyML Models for Autonomous Mini-Vehicles. 1-5 - Zhuoran Song, Dongyue Li, Zhezhi He, Xiaoyao Liang, Li Jiang:
ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural Network Accelerator. 1-5 - Khaled Humood, Baker Mohammad, Heba Abunahla:
DTRNG: Low Cost and Robust True Random Number Generator Using DRAM Weak Write Scheme. 1-5 - Kai Sheng, Linqi Shi, Weixin Gai, Qianting Hua, Peng Lin:
A 2-Bit 4-Level 4-Wire 56Gb/s Transceiver in 14nm FinFET. 1-5 - Cameron James Norris, Sunwoong Kim:
An Approximate and Iterative Posit Multiplier Architecture for FPGAs. 1-5 - C. Mohan, Luis A. Camuñas-Mesa, José M. de la Rosa, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco:
Implementation of Binary Stochastic STDP Learning Using Chalcogenide-Based Memristive Devices. 1-5 - Coen Arrow, Hancong Wu, Seungbum Baek, Herbert H. C. Iu, Kianoush Nazarpour, Jason Kamran Eshraghian:
Prosthesis Control Using Spike Rate Coding in the Retina Photoreceptor Cells. 1-5 - Satoshi Shioiri, Yoshiyuki Sato, Yuta Horaguchi, Hiroaki Muraoka, Mariko Nihei:
Quali-Informatics in the Society with Yotta Scale Data. 1-4 - Bojun Hu, Chao Liu, Sanfeng Zhang, Qiang Li:
A Ku-Band SiGe Phased-Array Transceiver with 6-Bit Phase and Attenuation Control. 1-5 - Chao Zhang, Jingtong Mo, Zihan Lian, Weifeng He:
High Energy-Efficient LDPC Decoder with AVFS System for NAND Flash Memory. 1-4 - Zhenghui Zhao, Chuanmin Jia, Shanshe Wang, Siwei Ma, Jiansheng Yang:
Learned Image Compression Using Adaptive Block-Wise Encoding and Reconstruction Network. 1-5 - Binghui Wang, Haigang Yang, Yiping Jia:
A 3-6GHz 5-to-512 Multiplier Adaptive Fast-Locking Self-Biased PLL in 28nm CMOS. 1-5 - Tolulope A. Odetola, Syed Rafay Hasan:
SoWaF: Shuffling of Weights and Feature Maps: A Novel Hardware Intrinsic Attack (HIA) on Convolutional Neural Network (CNN). 1-5 - Yadong Yin, Kamal El-Sankary, Zhizhang Chen, Ximing Fu:
A Type-II Analog PLL with Time-Domain Processing. 1-5 - Maria D. Vieira, Michael Canesche, Lucas Bragança, Josué Campos, Mateus Silva, Ricardo S. Ferreira, José Augusto Miranda Nacif:
RESHAPE: A Run-Time Dataflow Hardware-Based Mapping for CGRA Overlays. 1-5 - Farzin Ghorban, Nesreen Hasan, Jörg Velten, Anton Kummert:
Improving FM-GAN through Mixup Manifold Regularization. 1-5 - Cong Zhang, Dongsheng Liu, Xingjie Liu, Xuecheng Zou, Guangda Niu, Bo Liu, Quming Jiang:
Towards Efficient Hardware Implementation of NTT for Kyber on FPGAs. 1-5 - Jieyu Li, Zihan Lian, Hao Zhang, Weifeng He, Yanan Sun, Mingoo Seok:
Investigation of Dynamic Leakage-Suppression Logic Techniques Crossing Different Technology Nodes from 180 nm Bulk CMOS to 7 nm FinFET Plus Process. 1-5