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ORCIDShao-Chang Huang
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2020 – today
- 2023
[c17]Shao-Chang Huang, Ching-Ho Li, Chih-Cherng Liao, Jung-Tsun Chuang, Chien-Wei Wang, Gong-Kai Lin, Lin-Fan Chen, Chun-Chih Chen, Kuan-I Ho, Che-Hua Chang, Hsiao-Ying Yang, Chung-Ren Lao, Jian-Hsing Lee, Ke-Horng Chen
:
Optimizing Device Metal Routing Layouts by the Simulation Tool. ICCE-Taiwan 2023: 219-220- [c16]Shao-Chang Huang, Kai-Chieh Hsu, Chih-Hsuan Lin, Chien-Wei Wang, Ching-Ho Li, Chih-Cherng Liao, Jung-Tsun Chuang, Gong-Kai Lin, Lin-Fan Chen, Chun-Chih Chen, Yeh-Ning Jou, Jian-Hsing Lee, Ke-Horng Chen:
Bipolar Transistors' Holding Phenomena. ICCE-Taiwan 2023: 221-222 - [c15]Shao-Chang Huang, Chien-Wei Wang, Chih-Hsuan Lin, Kai-Chieh Hsu, Ching-Ho Li, Chih-Cherng Liao, Jung-Tsun Chuang, Gong-Kai Lin, Lin-Fan Chen, Chun-Chih Chen, Yeh-Ning Jou, Jian-Hsing Lee, Ke-Horng Chen:
Transmission Line Pulse Width Impacting on Device Performances. ICCE-Taiwan 2023: 227-228 - [c14]Jian-Hsing Lee, Gong-Kai Lin, Chun-Chih Chen, Li-Fan Chen, Chien-Wei Wang, Shao-Chang Huang, Ching-Ho Li, Chih-Cherng Liao, Jung-Tsun Chuang, Ke-Horng Chen:
A Concise Electrothermal Model to Characterize the Thermal Safe-Operating Area of Power Transistor. IRPS 2023: 1-6 - [c13]Shu-Yung Lin, Ssu-Yu Lin, Sheng-Hsi Hung, Tz-Wun Wang, Ching-Ho Li, Chang-Lin Go, Shao-Chang Huang, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A GaN Gate Driver with On-chip Adaptive On-time Controller and Negative Current Slope Detector. ISSCC 2023: 306-307 - [c12]Fei Huang, Hsing-Yen Tsai, Chi-Yu Huang, Yu-Chun Luo, Ching-Ho Li, Shao-Chang Huang, Yi-Hsiang Kao, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
3D Wireless Power Transfer with Noise Cancellation Technique for -62dB Noise Suppression and 90.1% Efficiency. ISSCC 2023: 452-453 - 2022
- [c11]Shao-Chang Huang, Jian-Hsing Lee, Chun-Chih Chen, Ching-Ho Li, Chih-Cherng Liao, Kai-Chieh Hsu, Gong-Kai Lin, Li-Fan Chen, Chien-Wei Wang, Chih-Hsuan Lin, Yeh-Ning Jou, Ke-Horng Chen:
Gate Voltages Impacting on Latch-up Measurements. ICCE-TW 2022: 75-76 - [c10]Sue-Yi Chen, Shao-Chang Huang, Kai-Chieh Hsu, Yin-Wei Peng, Jia-Ching Dong, Jon-Yiew Gan:
Reducing Large LDNMOSFET Substrate Currents by Modifying Isolation Ring Voltages. ICCE-TW 2022: 77-78 - [c9]Shao-Chang Huang, Jian-Hsing Lee, Ching-Ho Li, Sue-Yi Chen, Chih-Hsuan Lin, Chun-Chih Chen, Li-Fan Chen, Gong-Kai Lin, Chien-Wei Wang, Kai-Chieh Hsu, Szu-Chi Chen, Shang-Chuan Pai, Fu-Wei Pai, Yin-Wei Peng, Chih-Cherng Liao, Ke-Horng Chen:
EOS Endurance Power Circuits without Depletion Mode Devices. ICCE-TW 2022: 79-80 - [c8]Sue-Yi Chen, Yin-Wei Peng, Jia-Ching Dong, Kai-Chieh Hsu, Shao-Chang Huang, Jon-Yiew Gan:
Optimizing 20V LDNMOS Transistors for PMIC Applications by Simulation Tools. ICCE-TW 2022: 361-362 - 2021
- [c7]Shao-Chang Huang, Yu-Yung Kao, Ching-Ho Li, Li-Fan Chen, Chun-Chih Chen, Kai-Chieh Hsu, Gong-Kai Lin, Jian-Hsing Lee, Ke-Horng Chen:
Signal Control Switching Applied on Large Array Devices' Layouts. ICCE-TW 2021: 1-2 - [c6]Shao-Chang Huang, Yu-Yung Kao, Ching-Ho Li, Ching-Hua Liu, Ke-Horng Chen:
Creating Output Buffer Circuits by Karnaugh Maps. ICCE-TW 2021: 1-2 - [c5]Shao-Chang Huang, Ching-Ho Li, Li-Fan Chen, Chun-Chih Chen, Kai-Chieh Hsu, Gong-Kai Lin, Jian-Hsing Lee:
Optimizing Power IC Layouts by Simulation Tools. ICCE-TW 2021: 1-2 - 2020
- [c4]Shao-Chang Huang, Ching-Ho Li, Li-Fan Chen, Chun-Chih Chen, Ting-You Lin, Kai-Chieh Hsu, Gong-Kai Lin, Jian-Hsing Lee, Yu-Yung Kao, Ke-Horng Chen:
The Correlations between ESD and TLP in Large Array Devices. ICCE-TW 2020: 1-2 - [c3]Shao-Chang Huang, Ching-Ho Li, Li-Fan Chen, Chun-Chih Chen, Ting-You Lin, Kai-Chieh Hsu, Gong-Kai Lin, Chih-Hsuan Lin, Jian-Hsing Lee, Yu-Yung Kao, Ke-Horng Chen:
Signal Control Switching for Improving Large Array Devices' ESD Performances. ICCE-TW 2020: 1-2
2010 – 2019
- 2019
- [c2]Ting-You Lin, Chauchin Su, Chung-Chih Hung, Karuna Nidhi, Chily Tu, Shao-Chang Huang:
Package and Chip Accelerated Aging Methods for Power MOSFET Reliability Evaluation. DATE 2019: 1661-1666 - [c1]Shao-Chang Huang, Chih-Cherng Liao, Hsien-Feng Liao, Shou-Peng Weng, Karuna Nidhi, Yu-Kai Wang, Yi-Jen Chen, Hwa-Chyi Chiou, Yeh-Ning Jou, Jian-Hsing Lee:
Analyzing Gate-Driven Circuit Parameters for Adding ESD Performances. ICCE-TW 2019: 1-2 - 2018
- [j4]Shao-Chang Huang, Hung-Wei Chen, Jen-Hang Yang, Mi-Chang Chang:
Improving ESD protection of 5V NMOSFET large array device in 0.4μm BCD process. Microelectron. Reliab. 84: 48-54 (2018) - 2012
- [j3]Shao-Chang Huang, Ke-Horng Chen, Weiyao Lin, Zon-Lon Lee, Kun-Wei Chang, Erica Hsu, Wenson Lee, Lin-Fwu Chen, Chris Chun-Hung Lu:
Embedded I/O PAD Circuit Design for OTP Memory Power-Switch Functionality. IEEE Trans. Very Large Scale Integr. Syst. 20(4): 746-750 (2012) - [j2]Yu-Huei Lee, Shao-Chang Huang, Shih-Wei Wang, Ke-Horng Chen:
Fast Transient (FT) Technique With Adaptive Phase Margin (APM) for Current Mode DC-DC Buck Converters. IEEE Trans. Very Large Scale Integr. Syst. 20(10): 1781-1793 (2012) - 2011
- [j1]Shao-Chang Huang, Ke-Horng Chen:
Substrate Pick-Up Impacting on ESD Performances of Cascode NMOS Transistors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(2): 688-695 (2011)
Coauthor Index
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