default search action
John Keay
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2020
- [j1]Armin Tajalli, Mani Bastani Parizi, Dario Albino Carnelli, Chen Cao, Kiarash Gharibdoust, Davide Gorret, Amit Gupta, Christopher Hall, Ahmed Hassanin, Klaas L. Hofstra, Brian Holden, Ali Hormati, John Keay, Yohann Mogentale, Victor Perrin, John Phillips, Sumathi Raparthy, Amin Shokrollahi, David Stauffer, Richard Simpson, Andrew Stewart, Giuseppe Surace, Omid Talebi Amiri, Emanuele Truffa, Anton Tschank, Roger Ulrich, Christoph Walter, Anant Singh:
A 1.02-pJ/b 20.83-Gb/s/Wire USR Transceiver Using CNRZ-5 in 16-nm FinFET. IEEE J. Solid State Circuits 55(4): 1108-1123 (2020) - [c4]Armin Tajalli, Mani Bastani Parizi, Dario Albino Carnelli, Chen Cao, Kiarash Gharibdoust, Amit Gupta, Ahmed Hassanin, Klaas L. Hofstra, Brian Holden, Ali Hormati, John Keay, Amin Shokrollahi, David Stauffer, Richard Simpson, Andrew Stewart, Giuseppe Surace, Omid Talebi Amiri, Anton Tschank, Roger Ulrich, Christoph Walter, Anant Singh:
Short-Reach and Pin-Efficient Interfaces Using Correlated NRZ. CICC 2020: 1-8
2010 – 2019
- 2019
- [c3]Armin Tajalli, Mani Bastani Parizi, Dario Albino Carnelli, Chen Cao, John Fox, Kiarash Gharibdoust, Davide Gorret, Amit Gupta, Christopher Hall, Ahmed Hassanin, Klaas L. Hofstra, Brian Holden, Ali Hormati, John Keay, Yohann Mogentale, G. Paul, Victor Perrin, John Phillips, Sumathi Raparthy, Amin Shokrollahi, David Stauffer, Richard Simpson, Andrew Stewart, Giuseppe Surace, Omid Talebi Amiri, Emanuele Truffa, Anton Tschank, Roger Ulrich, Christoph Walter, Anant Singh:
A 1.02pJ/b 417Gb/s/mm USR Link in 16nm FinFET. VLSI Circuits 2019: 92- - 2016
- [c2]Amin Shokrollahi, Dario Albino Carnelli, John Fox, Klaas L. Hofstra, Brian Holden, Ali Hormati, Peter Hunt, Margaret Johnston, John Keay, Sergio Pesenti, Richard Simpson, David Stauffer, Andrew Stewart, Giuseppe Surace, Armin Tajalli, Omid Talebi Amiri, Anton Tschank, Roger Ulrich, Christoph Walter, Fabio Licciardello, Yohann Mogentale, Anant Singh:
10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS. ISSCC 2016: 182-183 - 2014
- [c1]Anant Singh, Dario Albino Carnelli, Altay Falay, Klaas L. Hofstra, Fabio Licciardello, Kia Salimi, Hugo Santos, Amin Shokrollahi, Roger Ulrich, Christoph Walter, John Fox, Peter Hunt, John Keay, Richard Simpson, Andrew Stewart, Giuseppe Surace, Harm S. Cronie:
26.3 A pin- and power-efficient low-latency 8-to-12Gb/s/wire 8b8w-coded SerDes link for high-loss channels in 40nm technology. ISSCC 2014: 442-443
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from , , and to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-04-25 05:41 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint