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Paul Gao 0001
Person information
- affiliation: University of Washington, Seattle, WA, USA
Other persons with the same name
- Paul Gao 0002 — Rice University, Houston, TX, USA
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2020 – today
- 2024
- [c4]Dai Cheol Jung, Max Ruttenberg, Paul Gao, Scott Davidson, Daniel Petrisko, Kangli Li, Aditya K. Kamath, Lin Cheng, Shaolin Xie, Peitian Pan, Zhongyuan Zhao, Zichao Yue, Bandhav Veluri, Sripathi Muralitharan, Adrian Sampson, Andrew Lumsdaine, Zhiru Zhang, Christopher Batten, Mark Oskin, Dustin Richmond, Michael Bedford Taylor:
Scalable, Programmable and Dense: The HammerBlade Open-Source RISC-V Manycore. ISCA 2024: 770-784 - 2022
- [i1]Mark Wyse
, Daniel Petrisko
, Farzam Gilani, Yuan-Mao Chueh, Paul Gao, Dai Cheol Jung, Sripathi Muralitharan, Shashank Vijaya Ranga, Mark Oskin, Michael B. Taylor:
The BlackParrot BedRock Cache Coherence System. CoRR abs/2211.06390 (2022) - 2020
- [j3]Dong-Hyeon Park
, Subhankar Pal
, Siying Feng
, Paul Gao, Jielun Tan, Austin Rovinski
, Shaolin Xie
, Chun Zhao
, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont
, Kuan-Yu Chen
, Chaitali Chakrabarti, Michael Bedford Taylor
, Trevor N. Mudge, David T. Blaauw
, Hun-Seok Kim
, Ronald G. Dreslinski:
A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator. IEEE J. Solid State Circuits 55(4): 933-944 (2020) - [j2]Daniel Petrisko
, Farzam Gilani, Mark Wyse
, Dai Cheol Jung, Scott Davidson, Paul Gao, Chun Zhao, Zahra Azad, Sadullah Canakci, Bandhav Veluri, Tavio Guarino, Ajay Joshi
, Mark Oskin, Michael Bedford Taylor:
BlackParrot: An Agile Open-Source RISC-V Multicore for Accelerator SoCs. IEEE Micro 40(4): 93-102 (2020) - [c3]Daniel Petrisko
, Chun Zhao, Scott Davidson, Paul Gao, Dustin Richmond
, Michael Bedford Taylor:
NoC Symbiosis : (Special Session Paper). NOCS 2020: 1-8
2010 – 2019
- 2019
- [c2]Austin Rovinski, Chun Zhao
, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang
, Ian Galton, Christopher Batten, Michael B. Taylor, Ronald G. Dreslinski:
A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS. VLSI Circuits 2019: 30- - [c1]Subhankar Pal
, Dong-Hyeon Park, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao
, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen
, Chaitali Chakrabarti, Michael B. Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski:
A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm. VLSI Circuits 2019: 150- - 2018
- [j1]Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawaj, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao
, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang
, Ronald G. Dreslinski, Christopher Batten, Michael B. Taylor:
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. IEEE Micro 38(2): 30-41 (2018)
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last updated on 2024-08-17 23:42 CEST by the dblp team
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