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Shinnung Jeong
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2020 – today
- 2024
- [c9]Shinnung Jeong
, Sungjun Cho
, Yongwoo Lee
, Hyunjun Park
, Seonyeong Heo
, Gwangsun Kim
, Youngsok Kim
, Hanjun Kim
:
CR2: Community-aware Compressed Regular Representation for Graph Processing on a GPU. ICPP 2024: 544-554 - [c8]Seungbin Song
, Ju Min Lee
, Haeeun Jeong
, Hyunho Kwon
, Shinnung Jeong
, Jaeho Lee
, Hanjun Kim
:
TeMCO: Tensor Memory Compiler Optimization across Tensor Decompositions in Deep Learning Inference. ICPP 2024: 1114-1123 - [c7]Chihyo Ahn, Shinnung Jeong, Liam Paul Cooper, Nicholas Parnenzini, Hyesoon Kim:
Comparative Analysis of Executing GPU Applications on FPGA: HLS vs. Soft GPU Approaches. IPDPS (Workshops) 2024: 634-641 - 2023
- [c6]Jaeho Lee
, Shinnung Jeong
, Seungbin Song, Kunwoo Kim, Heelim Choi, Youngsok Kim, Hanjun Kim:
Occamy: Memory-efficient GPU Compiler for DNN Inference. DAC 2023: 1-6 - 2022
- [c5]Shinnung Jeong
, Yongwoo Lee
, Jaeho Lee
, Heelim Choi, Seungbin Song, Jinho Lee
, Youngsok Kim, Hanjun Kim
:
Decoupling Schedule, Topology Layout, and Algorithm to Easily Enlarge the Tuning Space of GPU Graph Processing. PACT 2022: 198-210 - [c4]Yongwoo Lee, Seonyeong Heo, Seonyoung Cheon, Shinnung Jeong, Changsu Kim, Eunkyung Kim, Dongyoon Lee, Hanjun Kim:
HECATE: Performance-Aware Scale Optimization for Homomorphic Encryption Compiler. CGO 2022: 193-204 - [c3]Seonyeong Heo
, Shinnung Jeong
, Hanjun Kim
:
RTScale: Sensitivity-Aware Adaptive Image Scaling for Real-Time Object Detection. ECRTS 2022: 2:1-2:22 - 2021
- [j1]Bongjun Kim
, Seonyeong Heo
, Jaeho Lee
, Shinnung Jeong
, Yongwoo Lee
, Hanjun Kim
:
Compiler-Assisted Semantic-Aware Encryption for Efficient and Secure Serverless Computing. IEEE Internet Things J. 8(7): 5645-5656 (2021) - [c2]Changsu Kim, Shinnung Jeong
, Sungjun Cho
, Yongwoo Lee
, William Song
, Youngsok Kim, Hanjun Kim
:
Thread-Aware Area-Efficient High-Level Synthesis Compiler for Embedded Devices. CGO 2021: 327-339 - 2020
- [c1]Changsu Kim
, Yongwoo Lee
, Shinnung Jeong
, Wen Wang, Jakub Szefer, Hanjun Kim:
Pipeline-aware Logic Deduplication in High-Level Synthesis for Post-Quantum Cryptography Algorithms. FPGA 2020: 310
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