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ORCIDWen Wang 0007
Person information
- unicode name: 王雯
- affiliation: Yale University, Department of Electrical Engineering, New Haven, CT, USA
Other persons with the same name
- Wen Wang — disambiguation page
- Wen Wang 0001 — SRI International, Menlo Park, CA, USA (and 1 more)
- Wen Wang 0002
![[0000-0002-5812-6744]](https://dblp.org/img/orcid-mark.12x12.png "0000-0002-5812-6744")
— University of Minnesota Twin Cities, Minneapolis, MN, USA - Wen Wang 0003 — Massachusetts Institute of Technology, Cambridge, MA, USA
- Wen Wang 0004 — Fourth Military Medical University, Tangdu Hospital, Xi'an, Shaanxi, China
- Wen Wang 0005 — Changsha University of Science & Technology, Changsha, Hunan, China
- Wen Wang 0006 — Hangzhou Dianzi University, School of Mechanical Engineering, China (and 2 more)
- Wen Wang 0008 — Chinese Academy of Sciences, State Key Laboratory of Information Security, Institute of Information Engineering, Beijing, China
- Wen Wang 0009 — University of Science and Technology of China, China
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2020 – today
- 2023
[j4]Jianan Mu, Yi Ren, Wen Wang, Yizhong Hu, Shuai Chen, Chip-Hong Chang, Junfeng Fan, Jing Ye, Yuan Cao, Huawei Li, Xiaowei Li:
Scalable and Conflict-Free NTT Hardware Accelerator Design: Methodology, Proof, and Implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5): 1504-1517 (2023)- 2022
- [j3]Yuan Cao, Yanze Wu, Wen Wang, Xu Lu, Shuai Chen, Jing Ye, Chip-Hong Chang:
An Efficient Full Hardware Implementation of Extended Merkle Signature Scheme. IEEE Trans. Circuits Syst. I Regul. Pap. 69(2): 682-693 (2022) - [j2]Po-Jen Chen, Tung Chou, Sanjay Deshpande, Norman Lahr, Ruben Niederhagen, Jakub Szefer, Wen Wang:
Complete and Improved FPGA Implementation of Classic McEliece. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(3): 71-113 (2022) - [i6]Po-Jen Chen, Tung Chou, Sanjay Deshpande, Norman Lahr, Ruben Niederhagen, Jakub Szefer, Wen Wang:
Complete and Improved FPGA Implementation of Classic McEliece. IACR Cryptol. ePrint Arch. 2022: 412 (2022) - 2021
- [c11]Patrick Longa, Wen Wang, Jakub Szefer:
The Cost to Break SIKE: A Comparative Hardware-Based Analysis with AES and SHA-3. CRYPTO (3) 2021: 402-431 - 2020
- [j1]Wen Wang, Shanquan Tian, Bernhard Jungk, Nina Bindel, Patrick Longa, Jakub Szefer:
Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2020(3): 269-306 (2020) - [c10]Yixuan Zhao, Zhiteng Chao, Jing Ye, Wen Wang, Yuan Cao, Shuai Chen, Xiaowei Li, Huawei Li:
Optimization Space Exploration of Hardware Design for CRYSTALS-KYBER. ATS 2020: 1-6 - [c9]Changsu Kim, Yongwoo Lee, Shinnung Jeong, Wen Wang, Jakub Szefer, Hanjun Kim:
Pipeline-aware Logic Deduplication in High-Level Synthesis for Post-Quantum Cryptography Algorithms. FPGA 2020: 310 - [c8]Prashanth Mohan, Wen Wang, Bernhard Jungk, Ruben Niederhagen, Jakub Szefer, Ken Mai:
ASIC Accelerator in 28 nm for the Post-Quantum Digital Signature Scheme XMSS. ICCD 2020: 656-662 - [i5]Wen Wang, Shanquan Tian, Bernhard Jungk, Nina Bindel, Patrick Longa, Jakub Szefer:
Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA. IACR Cryptol. ePrint Arch. 2020: 54 (2020) - [i4]Patrick Longa, Wen Wang, Jakub Szefer:
The Cost to Break SIKE: A Comparative Hardware-Based Analysis with AES and SHA-3. IACR Cryptol. ePrint Arch. 2020: 1457 (2020)
2010 – 2019
- 2019
- [c7]Shanquan Tian, Wen Wang, Jakub Szefer:
Merge-Exchange Sort Based Discrete Gaussian Sampler with Fixed Memory Access Pattern. FPT 2019: 126-134 - [c6]Wen Wang, Bernhard Jungk, Julian Wälde, Shuwen Deng, Naina Gupta, Jakub Szefer, Ruben Niederhagen:
XMSS and Embedded Systems. SAC 2019: 523-550 - 2018
- [c5]Wen Wang, Jakub Szefer, Ruben Niederhagen:
Post-Quantum Cryptography on FPGAs: The Niederreiter Cryptosystem: Extended Abstract. ACM Great Lakes Symposium on VLSI 2018: 371 - [c4]Wen Wang, Jakub Szefer, Ruben Niederhagen:
FPGA-Based Niederreiter Cryptosystem Using Binary Goppa Codes. PQCrypto 2018: 77-98 - [i3]Wen Wang, Bernhard Jungk, Julian Wälde, Shuwen Deng, Naina Gupta, Jakub Szefer, Ruben Niederhagen:
XMSS and Embedded Systems - XMSS Hardware Accelerators for RISC-V. IACR Cryptol. ePrint Arch. 2018: 1225 (2018) - 2017
- [c3]Wen Wang, Jakub Szefer, Ruben Niederhagen:
FPGA-based Key Generator for the Niederreiter Cryptosystem Using Binary Goppa Codes. CHES 2017: 253-274 - [i2]Wen Wang, Jakub Szefer, Ruben Niederhagen:
FPGA-based Key Generator for the Niederreiter Cryptosystem using Binary Goppa Codes. IACR Cryptol. ePrint Arch. 2017: 595 (2017) - [i1]Wen Wang, Jakub Szefer, Ruben Niederhagen:
FPGA-based Niederreiter Cryptosystem using Binary Goppa Codes. IACR Cryptol. ePrint Arch. 2017: 1180 (2017) - 2016
- [c2]Sumedh Guha, Wen Wang, Shafeeq Ibraheem, Mahesh Balakrishnan, Jakub Szefer:
Design and implementation of open-source SATA III core for Stratix V FPGAs. FPT 2016: 237-240 - [c1]Wen Wang, Jakub Szefer, Ruben Niederhagen:
Solving large systems of linear equations over GF(2) on FPGAs. ReConFig 2016: 1-7
Coauthor Index
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last updated on 2023-05-31 02:27 CEST by the dblp team
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