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ORCIDCôme Rozon
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2010 – 2019
- 2013
[j7]Farid Moshgelani
, Dhamin Al-Khalili, Côme Rozon:
Ultra-Low Leakage Arithmetic Circuits Using Symmetric and Asymmetric FinFETs. J. Electr. Comput. Eng. 2013: 454392:1-454392:13 (2013)- 2012
- [c14]Farid Moshgelani, Dhamin Al-Khalili, Côme Rozon:
Ultra low leakage structures for logic circuits using symmetric and asymmetric FinFETs. NEWCAS 2012: 385-388 - 2011
- [c13]Jacques Laurent Athow, Côme Rozon, Dhamin Al-Khalili, J. M. Pierre Langlois:
A CNFET-based characterization framework for digital circuits. ICECS 2011: 681-684
2000 – 2009
- 2008
- [j6]Hussam Al-Hertani, Dhamin Al-Khalili, Côme Rozon:
UDSM subthreshold leakage model for NMOS transistor stacks. Microelectron. J. 39(12): 1809-1816 (2008) - 2006
- [j5]Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon:
Automatic generation of defect injectable VHDL fault models for ASIC standard cell libraries. Integr. 39(4): 382-406 (2006) - [c12]Hussam Al-Hertani, Dhamin Al-Khalili, Côme Rozon:
Accurate Total Static Leakage Current Estimation in Transistor Stacks. AICCSA 2006: 262-265 - 2005
- [c11]Hussam Al-Hertani, Dhamin Al-Khalili, Côme Rozon:
Leakage power dissipation in UDSM logic gates. Circuits, Signals, and Systems 2005: 132-136 - 2003
- [j4]Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon:
IC Bridge Fault Modeling for IP Blocks Using Neural Network-Based VHDL Saboteurs. IEEE Trans. Computers 52(10): 1285-1297 (2003) - 2002
- [j3]Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon:
Fault security analysis of CMOS VLSI circuits using defect-injectable VHDL models. Integr. 32(1-2): 77-97 (2002) - 2001
- [c10]Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon:
Accurate CMOS Bridge Fault Modeling with Neural Network-Based VHDL Saboteurs. ICCAD 2001: 531-536 - [c9]Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon:
Deriving accurate ASIC cell fault models for VITAL compliant VHDL simulation. ISCAS (5) 2001: 263-266 - 2000
- [c8]Côme Rozon, Dhamin Al-Khalili, Saman Adham, Douglas Racz:
Comparing defect coverage for current-mode logic and CMOS VLSI cells. ICECS 2000: 429-432 - [c7]Saman Adham, Dhamin Al-Khalili, Côme Rozon, Douglas Racz:
Comprehensive defect analysis and testability of current-mode logic circuits. ISCAS 2000: 339-342
1990 – 1999
- 1998
- [c6]Jason Coppens, Dhamin Al-Khalili, Côme Rozon:
VHDL Modelling and Analysis of Fault Secure Systems. DATE 1998: 148-152 - [c5]Dhamin Al-Khalili, Saman Adham, Côme Rozon, Moazzem Hossain, Douglas Racz:
Comprehensive Defect Analysis and Defect Coverage of CMOS Circuits. DFT 1998: 84-92 - 1996
- [c4]Côme Rozon:
On the Use of VHDL as a Multi-Valued Logic Simulator. ISMVL 1996: 110-117 - 1995
- [c3]D. B. Gravel, Germain Drolet, Côme Rozon:
Improved VLSI Design for Decoding Concatenated Codes Comprising an Irreducible Cyclic Code and a Reed-Solomon Code. Information Theory and Applications 1995: 104-110 - 1994
- [j2]Michael Ogbonna Esonu, Dhamin Al-Khalili, Côme Rozon:
Fault Characterization and Testability Analysis of Emitter Coupled Logic and Comparison with CMOS & BiCMOS Circuits. VLSI Design 1(4): 261-276 (1994) - 1993
- [c2]Michael Ogbonna Esonu, Dhamin Al-Khalili, Côme Rozon:
Fault Characterization and Testability Analysis of Emitter Coupled Logic and Comparison with CMOS & BiCMOS Circuits. ISCAS 1993: 1714-1717 - 1992
- [j1]Dhamin Al-Khalili, Côme Rozon, B. Stewart:
Testability analysis and fault modeling of BiCMOS circuits. J. Electron. Test. 3(3): 207-217 (1992) - 1991
- [c1]Côme Rozon, Hussein T. Mouftah:
Testability Analysis of CMOS Temary Circuits. ISMVL 1991: 158-165
Coauthor Index
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