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ORCIDWeixia Xu
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. The links to all actual bibliographies of persons of the same or a similar name can be found below. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
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Other persons with the same name
- Weixia Xu 0001
![[0009-0007-6327-7372]](https://dblp.org/img/orcid-mark.12x12.png "0009-0007-6327-7372")
— National University of Defense Technology (NUDT), College of Computer Science and Technology, Changsha, China - Weixia Xu 0002 — Shanghai Lixin University of Accounting and Finance, School of Information Management, Shanghai, China (and 1 more)
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2020 – today
- 2025
[j11]Ling Yang, Zhong Zheng, Libo Huang, Run Yan, Sheng Ma, Yongwen Wang, Weixia Xu:
Optimizing value prediction for ILP processors: A design space exploration approach. Integr. 103: 102402 (2025)- [c33]Xiangyu Wang, Yuan Li, Zhijie Yang, Chao Xiao, Xun Xiao, Renzhi Chen, Weixia Xu, Lei Wang:
ASNPC: An Automated Generation Framework for SNN and Neuromorphic Processor Co-Design. DATE 2025: 1-7 - [c32]Zhouhao Yang, Fangxu Lv, Mingche Lai, Zhang Luo, Weixia Xu, Chaolong Xu, Kefan Ma, Xiaoyue Hu, Cewen Liu, Zheng Peng, Xianchao Zeng:
Real-Time Demonstration of FPGA-Based Advanced Equalizer with ZF-NL-RSSE for Data Center Interconnects. ECOC 2025: 1-4 - [c31]Xinglin Chen, Yishuai Cai, Minglong Li, Yunxin Mao, Zhou Yang, Wenjing Yang, Weixia Xu, Ji Wang:
BTPG: A Platform and Benchmark for Behavior Tree Planning in Everyday Service Robots. IJCAI 2025: 8715-8723 - 2024
- [c30]Yude Fang, Junhui Wang, Libo Huang, Yongwen Wang, Weixia Xu:
Out-of-Order and Recursive RAS: A Return Address Stack Design on High Performance Processor. ASAP 2024: 116-117 - [c29]Chao Xiao, Yifei Deng, Zhijie Yang, Renzhi Chen, Hong Wang, Jingyue Zhao, Huadong Dai, Lei Wang, Yuhua Tang, Weixia Xu:
LLM-Based Processor Verification: A Case Study for Neuronnorphic Processor. DATE 2024: 1-6 - [c28]Yuan Li, Renzhi Chen, Zhijie Yang, Xun Xiao, Jingyue Zhao, Zhenhua Zhu, Huadong Dai, Yuhua Tang, Weixia Xu, Li Luo, Lei Wang:
MOTPE/D: Hardware and Algorithm Co-design for Reconfigurable Neuromorphic Processor. ICCD 2024: 521-524 - [c27]Xinglin Chen, Yishuai Cai, Yunxin Mao, Minglong Li, Wenjing Yang, Weixia Xu, Ji Wang:
Integrating Intent Understanding and Optimal Behavior Planning for Behavior Tree Generation from Human Instructions. IJCAI 2024: 6832-6840 - [c26]Chongshan Liang, Yi Dai, Jun Xia, Jinbo Xu, Jintao Peng, Weixia Xu, Ming Xie, Jie Liu, Zhiquan Lai, Sheng Ma, Qi Zhu:
The Self-adaptive and Topology-aware MPI_Bcast leveraging Collective offload on Tianhe Express Interconnect. IPDPS 2024: 791-801 - [i4]Xinglin Chen, Yishuai Cai, Yunxin Mao, Minglong Li, Wenjing Yang, Weixia Xu, Ji Wang:
Integrating Intent Understanding and Optimal Behavior Planning for Behavior Tree Generation from Human Instructions. CoRR abs/2405.07474 (2024) - [i3]Xinglin Chen, Yishuai Cai, Yunxin Mao, Minglong Li, Zhou Yang, Shanghua Wen, Wenjing Yang, Weixia Xu, Ji Wang:
Efficient Behavior Tree Planning with Commonsense Pruning and Heuristic. CoRR abs/2406.00965 (2024) - 2023
- [j10]Ziyang Kang, Shiming Li, Shi-Ying Wang, Lianhua Qu, Rui Gong, Wei Shi, Weixia Xu, Lei Wang:
Path-Based Multicast Routing for Network-on-Chip of the Neuromorphic Processor. J. Comput. Sci. Technol. 38(5): 1098-1112 (2023) - [c25]Qihang Zhang, Zhaoguo Liu, Zhuoer Wen, Da Huang, Weixia Xu:
CWA-LSTM: A Stock Price Prediction Model Based on Causal Weight Adjustment. ICIC (5) 2023: 421-432 - 2022
- [j9]Ling Yang, Libo Huang, Run Yan, Nong Xiao, Sheng Ma, Li Shen, Weixia Xu:
Stride Equality Prediction for Value Speculation. IEEE Comput. Archit. Lett. 21(2): 57-60 (2022) - [j8]Zhijie Yang, Lei Wang, Yao Wang, Zhong Wan, Rui Gong, Wei Shi, Jingwei Zhu, Weixia Xu:
Lotus: a memory organization for loose and tight coupling neurons in neuromorphic architecture. CCF Trans. High Perform. Comput. 4(4): 448-460 (2022) - [c24]Zhijie Yang, Lei Wang, Yao Wang, LingHui Peng, Xiaofan Chen, Xun Xiao, Yaohua Wang, Weixia Xu:
Unicorn: a multicore neuromorphic processor with flexible fan-in and unconstrained fan-out for neurons. DAC 2022: 943-948 - 2021
- [c23]Chongshan Liang, Yi Dai, Weixia Xu, Qiong Li:
Advanced Architecture Design of High-Radix Router Based on Chiplet Integration and IP Reusability. HPCC/DSS/SmartCity/DependSys 2021: 123-132 - 2020
- [j7]Zhaosong Huang, Ye Zhao, Wei Chen, Shengjie Gao, Kejie Yu, Weixia Xu, Mingjie Tang, Minfeng Zhu, Mingliang Xu:
A Natural-language-based Visual Query Approach of Uncertain Human Trajectories. IEEE Trans. Vis. Comput. Graph. 26(1): 1256-1266 (2020) - [c22]Chao Wang, Weixia Xu, Mingche Lai, Jijun Cao:
Design of Converged Network Coding Layer for the Ethernet and HPC High-Speed Network. HPCC/DSS/SmartCity 2020: 163-169 - [i2]Shuo Tian, Lianhua Qu, Kai Hu, Nan Li, Lei Wang, Weixia Xu:
A Neural Architecture Search based Framework for Liquid State Machine Design. CoRR abs/2004.07864 (2020)
2010 – 2019
- 2019
- [i1]Zhaosong Huang, Ye Zhao, Wei Chen, Shengjie Gao, Kejie Yu, Weixia Xu, Mingjie Tang, Minfeng Zhu, Mingliang Xu:
A Natural-language-based Visual Query Approach of Uncertain Human Trajectories. CoRR abs/1908.00277 (2019) - 2018
- [c21]Wei Guo, Meng Xu, Weixia Xu, Lizhen Cui:
A Collaboration Services Scheduling Method Based on Intelligent Genetic Algorithm. ChineseCSCW 2018: 581-587 - [e4]Weixia Xu, Liquan Xiao, Jinwen Li, Chengyi Zhang, Zhenzhen Zhu:
Computer Engineering and Technology - 21st CCF Conference, NCCET 2017, Xiamen, China, August 16-18, 2017, Revised Selected Papers. Communications in Computer and Information Science 600, Springer 2018, ISBN 978-981-10-7843-9 [contents] - 2017
- [c20]Lei Shan, Canqun Yang, Weixia Xu, Minxuan Zhang:
Heterogeneous acceleration for CNN training with many integrated core. ICSPCC 2017: 1-6 - [c19]Naiyang Guan, Lei Shan, Canqun Yang, Weixia Xu, Minxuan Zhang:
Delay Compensated Asynchronous Adam Algorithm for Deep Neural Networks. ISPA/IUCC 2017: 852-859 - 2016
- [c18]Jie Jian, Mingche Lai, Liquan Xiao, Weixia Xu:
Graphein: A Novel Optical High-Radix Switch Architecture for 3D Integration. ICA3PP 2016: 162-177 - [c17]He Wang, Weixia Xu, Naiyang Guan, Canqun Yang:
Monaural Speech Separation on Many Integrated Core Architecture. NCCET 2016: 149-156 - [c16]Lei Shan, He Wang, Weixia Xu, Canqun Yang, Minxuan Zhang:
Accelerating Nyström Kernel Independent Component Analysis with Many Integrated Core Architecture. NCCET 2016: 168-176 - [e3]Weixia Xu, Liquan Xiao, Jinwen Li, Chengyi Zhang:
Computer Engineering and Technology - 19th CCF Conference, NCCET 2015, Hefei, China, October 18-20, 2015, Revised Selected Papers. Communications in Computer and Information Science 592, Springer 2016, ISBN 978-3-662-49282-6 [contents] - [e2]Weixia Xu, Liquan Xiao, Jinwen Li, Chengyi Zhang, Zhenzhen Zhu:
Computer Engineering and Technology - 20th CCF Conference, NCCET 2016, Xi'an, China, August 10-12, 2016, Revised Selected Papers. Communications in Computer and Information Science 666, Springer 2016, ISBN 978-981-10-3158-8 [contents] - 2015
- [c15]Jinbo Xu, Weixia Xu, Zhengbin Pang:
A low-latency fine-grained dynamic shared cache management scheme for chip multi-processor. IPCCC 2015: 1-7 - 2014
- [j6]Weixia Xu, Yutong Lu, Qiong Li, Enqiang Zhou, Zhenlong Song, Yong Dong, Wei Zhang, Dengping Wei, Xiaoming Zhang, Haitao Chen, Jianying Xing, Yuan Yuan:
Hybrid hierarchy storage system in MilkyWay-2 supercomputer. Frontiers Comput. Sci. 8(3): 367-377 (2014) - [j5]Junsheng Chang, Zhengbin Pang, Weixia Xu, Huaimin Wang, Gang Yin:
An incentive compatible reputation mechanism for P2P systems. J. Supercomput. 69(3): 1382-1409 (2014) - [c14]Shaogang Wang, Weixia Xu, Dan Wu, Zhengbin Pang:
Fast NIC based RDMA implementation for adaptive unreliable networks. AICCSA 2014: 302-309 - [c13]Jinbo Xu, Weixia Xu, Kefei Wang, Zhengbin Pang:
Low-latency last-level cache structure based on grouped cores in Chip Multi-Processor. IPCCC 2014: 1-2 - 2013
- [c12]Shaogang Wang, Weixia Xu, Dan Wu, Zhengbin Pang, Pingjing Lu:
Scalable NIC Architecture to Support Offloading of Large Scale MPI Barrier. APPT 2013: 214-226 - [e1]Weixia Xu, Liquan Xiao, Chengyi Zhang, Jinwen Li, Liyan Yu:
Computer Engineering and Technology - 17th CCF Conference, NCCET 2013, Xining, China, July 20-22, 2013. Revised Selected Papers. Communications in Computer and Information Science 396, Springer 2013, ISBN 978-3-642-41634-7 [contents] - 2012
- [j4]Yang Guo, WanXia Qu, Long Zhang, Weixia Xu:
State space reduction in modeling checking parameterized cache coherence protocol by two-dimensional abstraction. J. Supercomput. 62(2): 828-854 (2012) - [c11]Junsheng Chang, Weixia Xu, Zhengbin Pang, Jun Zhang, Gang Yin:
PIM: A Policy-Based Incentive Mechanism for Promoting Honest Recommendations in Reputation Systems. CIT 2012: 391-397 - [c10]Shaogang Wang, Weixia Xu, Zhengbin Pang, Dan Wu, Yi Dai, Pingjing Lu:
Optimizing Private Memory Performance by Dynamically Deactivating Cache Coherence. HPCC-ICESS 2012: 1112-1117 - [c9]Yi Dai, Kefei Wang, Weixia Xu, Heying Zhang, Shaogang Wang:
Frame Error Rate Testing for High Speed Optical Interconnect. ICA3PP (2) 2012: 31-39 - 2011
- [j3]Jianmin Zhang, ShengYu Shen, Jun Zhang, Weixia Xu, Sikun Li:
Extracting minimal unsatisfiable subformulas in satisfiability modulo theories. Comput. Sci. Inf. Syst. 8(3): 693-710 (2011) - [c8]Weixia Xu, Jinbo Xu, Zhengbin Pang:
A Parallel Processing Scheme for Large-Size Sliding-Window Applications. HPCC 2011: 35-39 - [c7]Wei Shi, Weixia Xu, Hongguang Ren, Qiang Dou, Zhiying Wang, Li Shen, Cong Liu:
A novel shared-buffer router for network-on-chip based on Hierarchical Bit-line Buffer. ICCD 2011: 267-272 - [c6]Jianmin Zhang, Weixia Xu, Jun Zhang, ShengYu Shen, Zhengbin Pang, Tiejun Li, Jun Xia, Sikun Li:
Finding First-Order Minimal Unsatisfiable Cores with a Heuristic Depth-First-Search Algorithm. IDEAL 2011: 178-185 - [c5]Wei Chen, Weixia Xu, Zhiying Wang, Qiang Dou, Yongwen Wang, Baokang Zhao, Baosheng Wang:
A Formalization of an Emulation Based Co-designed Virtual Machine. IMIS 2011: 164-168 - 2010
- [j2]Xuejun Yang, Xiangke Liao, Weixia Xu, Junqiang Song, Qingfeng Hu, Jinshu Su, Liquan Xiao, Kai Lu, Qiang Dou, Juping Jiang, Canqun Yang:
TH-1: China's first petaflop supercomputer. Frontiers Comput. Sci. China 4(4): 445-455 (2010) - [j1]Weixia Xu, Qiang Dou, Ying Zhang, Gen Li, Xuejun Yang:
Exploiting Loop-Carried Stream Reuse for Scientific Computing Applications on the Stream Processor. Int. J. Commun. Netw. Syst. Sci. 3(1): 32-37 (2010) - [c4]Weixia Xu, Wei Chen, Qiang Dou:
A Novel Chaining Approach for Direct Control Transfer Instructions. ICPADS 2010: 664-669
2000 – 2009
- 2009
- [c3]Shaogang Wang, Weixia Xu, Zhengbin Pang, Dan Wu, Qiang Dou, Xiaodong Yang:
DTM: Decoupled Hardware Transactional Memory to Support Unbounded Transaction and Operating System. ICPP 2009: 228-236 - [c2]Rangyu Deng, Weixia Xu, Qiang Dou, Hongwei Zhou, Zefu Dai, Haiyan Chen:
An efficient stream memory architecture for heterogeneous multicore processor. ISCC 2009: 287-290
1990 – 1999
- 1997
- [c1]Liquan Xiao, Weixia Xu, Xingming Zhou:
A Dual-Processors Multithreaded Architecture and Its Driven Execution Model. APDC 1997: 214-219
Coauthor Index
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