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Jheng-Hao Ye
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2010 – 2019
- 2018
- [j2]Jheng-Hao Ye, Ming-Der Shieh
:
Low-Complexity VLSI Design of Large Integer Multipliers for Fully Homomorphic Encryption. IEEE Trans. Very Large Scale Integr. Syst. 26(9): 1727-1736 (2018) - [c7]Jheng-Hao Ye, Si-Quan Chen, Ming-Der Shieh:
Minimizing ESOP Expressions for Fully Homomorphic Encryption. ISCAS 2018: 1-4 - [c6]Jheng-Hao Ye, Ming-Der Shieh:
High-performance NTT architecture for large integer multiplication. VLSI-DAT 2018: 1-4 - 2014
- [j1]Wen-Ching Lin, Jheng-Hao Ye, Ming-Der Shieh:
Scalable Montgomery Modular Multiplication Architecture with Low-Latency and Low-Memory Bandwidth Requirement. IEEE Trans. Computers 63(2): 475-483 (2014) - [c5]Jheng-Hao Ye, Szu-Han Huang, Ming-Der Shieh:
An efficient countermeasure against power attacks for ECC over GF(p). ISCAS 2014: 814-817 - 2013
- [c4]Jheng-Hao Ye, Tsung-Wei Hung, Ming-Der Shieh:
Energy-efficient architecture for word-based Montgomery modular multiplication algorithm. VLSI-DAT 2013: 1-4 - 2012
- [c3]Wen-Ching Lin, Jheng-Hao Ye, Der-Wei Yang, Si-Yu Huang, Ming-Der Shieh, Jonas Wang:
Efficient scissoring scheme for scanline-based rendering of 2D vector graphics. ISCAS 2012: 766-769 - [c2]Sheng-Hong Wang, Wen-Ching Lin, Jheng-Hao Ye, Ming-Der Shieh:
Fast scalable radix-4 Montgomery modular multiplier. ISCAS 2012: 3049-3052
2000 – 2009
- 2009
- [c1]Jun-Jie Zhu, Wen-Ching Lin, Jheng-Hao Ye, Ming-Der Shieh:
Efficient Software-Based Self-Test Methods for Embedded Digital Signal Processors. Asian Test Symposium 2009: 206-211
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