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2010 – 2019
- 2014
[j4]Qin Tang, Javier Rodríguez, Amir Zjajo, Michel Berkelaar, Nick van der Meijs:
Statistical Transistor-Level Timing Analysis Using a Direct Random Differential Equation Solver. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(2): 210-223 (2014)- [j3]Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs:
Considering Crosstalk Effects in Statistical Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(2): 318-322 (2014) - 2012
- [c7]Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs:
Crosstalk-aware statistical interconnect delay calculation. ASP-DAC 2012: 371-376 - [c6]Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs:
Transistor-level gate model based statistical timing analysis considering correlations. DATE 2012: 917-922 - [c5]Javier Rodríguez, Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs:
Direct Statistical Simulation of Timing Properties in Sequential Circuits. PATMOS 2012: 131-141 - 2011
- [j2]Amir Zjajo, Qin Tang, Michel Berkelaar, José Pineda de Gyvez, Alessandro Di Bucchianico
, Nick van der Meijs:
Stochastic Analysis of Deep-Submicrometer CMOS Process for Reliable Circuits Designs. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(1): 164-175 (2011) - [c4]Ashish Nigam, Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs:
Pseudo circuit model for representing uncertainty in waveforms. DATE 2011: 1521-1524 - 2010
- [j1]Ashish Nigam, Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs:
Statistical Moment Estimation of Delay and Power in Circuit Simulation. J. Low Power Electron. 6(4): 578-587 (2010) - [c3]Amir Zjajo, Qin Tang, Michel Berkelaar, Nick van der Meijs:
Noise analysis of non-linear dynamic integrated circuits. CICC 2010: 1-4 - [c2]Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs:
RDE-based transistor-level gate simulation for statistical static timing analysis. DAC 2010: 787-792 - [c1]Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs:
Transistor-Level Gate Modeling for Nano CMOS Circuit Verification Considering Statistical Process Variations. PATMOS 2010: 190-199
Coauthor Index
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