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2000 – 2009
- 2000
[b1]Kaushik Roy, Sharat Prasad:
Low-Power CMOS VLSI Circuit Design. Wiley 2000, ISBN 978-0-471-11488-8, pp. I-XV, 1-359
1990 – 1999
- 1998
- [c7]Sharat Prasad, Kamran Kiasaleh, Poras T. Balsara:
LAPLUS: An Efficient, Effective and Stable Switch Algorithm for Flow Control of the Available Bit Rate ATM Service. INFOCOM 1998: 174-182 - 1994
- [c6]Kaushik Roy, Sharat Prasad:
Logic synthesis for reliability - an early start to controlling electromigration and hot carrier effects. EURO-DAC 1994: 136-141 - [c5]Kaushik Roy, Sharat Prasad:
Power Dissipation Driven FPGA Place and Route Under Delay Constraints. FPL 1994: 57-65 - [c4]Tan-Li Chou, Kaushik Roy, Sharat Prasad:
Estimation of circuit activity considering signal correlations and simultaneous switching. ICCAD 1994: 300-303 - 1993
- [c3]Sharat Prasad, Paul Kollaritsch, P. Anirudhan, D. K. Hwang, Steve Lusky, R. Farrow:
Efficient Floorplan Enumeration Using Dynamic Programming. ISCAS 1993: 1766-1769 - 1992
- [c2]Kaushik Roy, Sharat Prasad:
SYCLOP: Synthesis of CMOS Logic for Low Power Applications. ICCD 1992: 464-467
1980 – 1989
- 1988
- [c1]Paul Kollaritsch, Steve Lusky, Sharat Prasad, Neil Potter:
CLAY: a malleable-cell multi-cell transistor matrix approach for CMOS LAYout synthesis. ICCAD 1988: 142-145
Coauthor Index
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