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2010 – 2019
- 2015
[j4]Chen-Yen Ho, Cong Liu, Chi-Lun Lo, Hung-Chieh Tsai, Tze-Chien Wang, Yu-Hsin Lin:
A 4.5 mW CT Self-Coupled ΔΣ Modulator With 2.2 MHz BW and 90.4 dB SNDR Using Residual ELD Compensation. IEEE J. Solid State Circuits 50(12): 2870-2879 (2015)- [c2]Chen-Yen Ho, Cong Liu, Chi-Lun Lo, Hung-Chieh Tsai, Tze-Chien Wang, Yu-Hsin Lin:
15.2 A 4.5mW CT self-coupled ΔΣ modulator with 2.2MHz BW and 90.4dB SNDR using residual ELD compensation. ISSCC 2015: 1-3 - 2013
- [j3]Tzung-Han Wu, Hsiang-Hui Chang, Shin-Fu Chen, Chinq-Shiun Chiu, Li-Shin Lai, Chi-Hsueh Wang, Song-Yu Yang, Ta-Hsin Lin, Jhy-Rong Chen, Hung-Chieh Tsai, Chi-Yao Yu, Sheng-Yuan Su, Tai-Yuan Yu, Chieh-Chuan Chin, Guang-Kaai Dehng, Augusto Marques, Caiyi Wang, George Chien:
A 65-nm GSM/GPRS/EDGE SoC With Integrated BT/FM. IEEE J. Solid State Circuits 48(5): 1161-1173 (2013) - [j2]Hung-Chieh Tsai, Chi-Lun Lo, Chen-Yen Ho, Yu-Hsin Lin:
A 64-fJ/Conv.-Step Continuous-Time Sigma Delta Modulator in 40-nm CMOS Using Asynchronous SAR Quantizer and Digital Delta Sigma Truncator. IEEE J. Solid State Circuits 48(11): 2637-2648 (2013) - 2012
- [j1]Shyuan Liao, Yen-Shuo Chang, Chia-Hsin Wu, Hung-Chieh Tsai, Hsin-Hua Chen, Min Chen, Ching-Wen Hsueh, Jian-Bang Lin, Den-Kai Juang, Shun-An Yang, Chin-Tai Liu, Tsai-Pao Lee, Jin-Ru Chen, Chih-Heng Shih, Barry Hong, Heng-Ruey Hsu, Chih-Yuan Wang, Meng-Shiang Lin, Wei-Hsiang Tseng, Che-Hsiung Yang, Lawrence Chen Lee, Ting-Jyun Jheng, Wen-Wei Yang, Ming-Yang Chao, Jyh-Shin Pan:
A 70-Mb/s 100.5-dBm Sensitivity 65-nm LP MIMO Chipset for WiMAX Portable Router. IEEE J. Solid State Circuits 47(1): 61-74 (2012)
2000 – 2009
- 2004
- [c1]Hung-Chieh Tsai, Jyh-Yih Yeh, Wei-Hsuan Tu, Tai-Cheng Lee, Chorng-Kuang Wang:
A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier. ISCAS (4) 2004: 393-396
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