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ORCIDMargarida F. Jacome
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2000 – 2009
- 2009
[j16]Jeffry T. Russell, Margarida F. Jacome:
Program slicing across the hardware-software boundary for embedded systems. Int. J. Embed. Syst. 4(1): 66-82 (2009)- [c36]Muhammad Umar Farooq, Lizy Kurian John, Margarida F. Jacome:
Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures. HiPEAC 2009: 324-338 - [p3]Margarida F. Jacome, Anand Ramachandran:
Power Aware Embedded Computing. Embedded Systems Design and Verification 2009: 11 - 2007
- [j15]Chen He, Margarida F. Jacome:
Defect-Aware High-Level Synthesis Targeted at Reconfigurable Nanofabrics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5): 817-833 (2007) - [c35]Fadi A. Zaraket
, John Pape, Adnan Aziz, Margarida F. Jacome, Sarfraz Khurshid:
Global Optimization of Compositional Systems. FMCAD 2007: 93-100 - [c34]Ayis Ziotopoulos, Margarida F. Jacome, Gustavo de Veciana:
An RFID-Based Platform Supporting Context-Aware Computing in Complex Spaces. MDM 2007: 294-298 - [c33]Elias Mizan, Tileli Amimeur, Margarida F. Jacome:
Self-Imposed Temporal Redundancy: An Efficient Technique to Enhance the Reliability of Pipelined Functional Units. SBAC-PAD 2007: 45-53 - 2006
- [c32]Chen He, Margarida F. Jacome:
RAS-NANO: a reliability-aware synthesis framework for reconfigurable nanofabrics. DATE 2006: 1179-1184 - 2005
- [j14]Chen He, Margarida F. Jacome, Gustavo de Veciana:
A Reconfiguration-Based Defect-Tolerant Design Paradigm for Nanotechnologies. IEEE Des. Test Comput. 22(4): 316-326 (2005) - [j13]Anand Ramachandran, Margarida F. Jacome:
Energy-delay efficient data memory subsystems: suitable for embedded media "processing". IEEE Signal Process. Mag. 22(3): 23-37 (2005) - [j12]Satish Pillai, Margarida F. Jacome:
Predicated switching - optimizing speculation on EPIC machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(3): 318-335 (2005) - [j11]Anand Ramachandran, Margarida F. Jacome:
Xtream-fit: an energy-delay efficient data memory subsystem for embedded media processing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(6): 832-848 (2005) - [c31]Andrey V. Zykov, Elias Mizan, Margarida F. Jacome, Gustavo de Veciana, Ajay Subramanian:
High performance computing on fault-prone nanotechnologies: novel microarchitecture techniques exploiting reliability-delay trade-offs. DAC 2005: 270-273 - [c30]Chen He, Margarida F. Jacome, Gustavo de Veciana:
Scalable defect mapping and configuration of memory-based nanofabrics. HLDVT 2005: 11-18 - [p2]Margarida F. Jacome, Anand Ramachandran:
Power Aware Embedded Computing. The Industrial Information Technology Handbook 2005: 1-23 - [r1]Anand Ramachandran, Margarida F. Jacome:
Power Aware Embedded Computing. Embedded Systems Handbook 2005 - 2004
- [c29]Margarida F. Jacome, Chen He, Gustavo de Veciana, Stephen Bijansky:
Defect tolerant probabilistic design paradigm for nanotechnologies. DAC 2004: 596-601 - 2003
- [j10]Margarida F. Jacome, Francky Catthoor:
Special issue on power-aware embedded computing. ACM Trans. Embed. Comput. Syst. 2(3): 251-254 (2003) - [c28]Anand Ramachandran, Margarida F. Jacome:
Xtream-Fit: an energy-delay efficient data memory subsystem for embedded media processing. DAC 2003: 137-142 - [c27]Jeffry T. Russell, Margarida F. Jacome:
Architecture-level performance evaluation of component-based embedded systems. DAC 2003: 396-401 - [c26]Satish Pillai, Margarida F. Jacome:
Compiler-Directed ILP Extraction for Clustered VLIW/EPIC Machines: Predication, Speculation and Modulo Scheduling. DATE 2003: 10422-10427 - [c25]Jeffry T. Russell, Margarida F. Jacome:
Embedded Architect: A Tool for Early Performance Evaluation of Embedded Software. ICSE 2003: 824-825 - [c24]Chen He, Marcello Lajolo, Margarida F. Jacome:
A Case Study of a System Level Approach to Exploration of Queuing Management Schemes for Input Queue Packet Switches. PDP 2003: 401-408 - [p1]Satish Pillai, Margarida F. Jacome:
Compiler-Directed ILP Extraction for Clustered VLIW/EPIC Machines. Embedded Software for SoC 2003: 245-259 - 2002
- [j9]Cagdas Akturan, Margarida F. Jacome:
An Effective Software Pipelining Algorithm for Clustered Embedded VLIW Processors. Des. Autom. Embed. Syst. 7(1-2): 115-138 (2002) - [j8]Viktor S. Lapinskii, Margarida F. Jacome, Gustavo de Veciana:
Application-specific clustered VLIW datapaths: early exploration on a parameterized design space. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(8): 889-903 (2002) - [j7]Cagdas Akturan, Margarida F. Jacome:
RS-FDRA: A register-sensitive software pipelining algorithm for embedded VLIW processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(12): 1395-1415 (2002) - [j6]Viktor S. Lapinskii, Margarida F. Jacome, Gustavo de Veciana:
Cluster assignment for high-performance embedded VLIW processors. ACM Trans. Design Autom. Electr. Syst. 7(3): 430-454 (2002) - [c23]Jeffry T. Russell, Margarida F. Jacome:
Scenario-based software characterization as a contingency to traditional program profiling. CASES 2002: 170-177 - 2001
- [j5]Margarida F. Jacome, Helvio P. Peixoto:
A Survey of Digital Design Reuse. IEEE Des. Test Comput. 18(3): 98-107 (2001) - [c22]Cagdas Akturan, Margarida F. Jacome:
RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors. CODES 2001: 67-72 - [c21]Margarida F. Jacome, Gustavo de Veciana, Satish Pillai:
Clustered VLIW Architectures with Predicated Switching. DAC 2001: 696-701 - [c20]Viktor S. Lapinskii, Margarida F. Jacome, Gustavo de Veciana:
High-Quality Operation Binding for Clustered VLIW Datapaths. DAC 2001: 702-707 - [c19]Cagdas Akturan, Margarida F. Jacome:
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors. ICCAD 2001: 112-118 - 2000
- [j4]Gustavo de Veciana, Margarida F. Jacome, Jian-Huei Guo:
Assessing Probabilistic Timing Constraints on System Performance. Des. Autom. Embed. Syst. 5(1): 61-81 (2000) - [j3]Margarida F. Jacome, Gustavo de Veciana:
Design Challenges for New Application-Specific Processors. IEEE Des. Test Comput. 17(2): 40-50 (2000) - [c18]R. Anand, Margarida F. Jacome, Gustavo de Veciana:
Heuristic tradeoffs between latency and energy consumption in register assignment. CODES 2000: 115-119 - [c17]Helvio P. Peixoto, Margarida F. Jacome:
A new technique for estimating lower bounds on latency for high level synthesis. ACM Great Lakes Symposium on VLSI 2000: 129-132 - [c16]Margarida F. Jacome, Gustavo de Veciana, Viktor S. Lapinskii:
Exploring Performance Tradeoffs for Clustered VLIW ASIPs. ICCAD 2000: 504-510 - [c15]Satish Pillai, Margarida F. Jacome:
Symbolic Binding for Clustered VLIW ASIPs. ICCD 2000: 437-444 - [c14]Cagdas Akturan, Margarida F. Jacome:
FDRA: A Software-Pipelining Algorithm for Embedded VLIW Processors. ISSS 2000: 34-40 - [c13]Hugo A. Andrade, Margarida F. Jacome:
The Common Hardware and Software Object Model: CHSOM. PDPTA 2000 - [c12]Helvio P. Peixoto, Margarida F. Jacome, Ander Royo:
A Tight Area Upper Bound for Slicing Floorplans. VLSI Design 2000: 280-
1990 – 1999
- 1999
- [c11]Margarida F. Jacome, Gustavo de Veciana, Cagdas Akturan:
Resource constrained dataflow retiming heuristics for VLIW ASIPs. CODES 1999: 12-16 - [c10]Margarida F. Jacome, Helvio P. Peixoto, Ander Royo, Juan Carlos López:
The Design Space Layer: Supporting Early Design Space Exploration for Core-Based Designs. DATE 1999: 676-683 - [c9]Margarida F. Jacome, Gustavo de Veciana:
Lower bound on latency for VLIW ASIP datapaths. ICCAD 1999: 261-269 - 1998
- [c8]Gustavo de Veciana, Margarida F. Jacome, Jian-Huei Guo:
Hierarchical Algorithms for Assessing Probabilistic Constraints on System Performance. DAC 1998: 251-256 - [c7]Pedro Merino, Margarida F. Jacome, Juan Carlos López:
A Methodology for Task Based Partitioning and Scheduling of Dynamically Reconfigurable Systems. FCCM 1998: 324-325 - [c6]Pedro Merino, Juan Carlos López, Margarida F. Jacome:
A Hardwar Operating System for Dynamic Reconfiguration of FPGAs. FPL 1998: 431-435 - [c5]Jeffry T. Russell, Margarida F. Jacome:
Software power estimation and optimization for high performance, 32-bit embedded processors. ICCD 1998: 328-333 - 1997
- [j2]Margarida F. Jacome, Viktor S. Lapinskii:
NREC: Risk Assessment and Planning of Complex Designs. IEEE Des. Test Comput. 14(1): 42-49 (1997) - [c4]Helvio P. Peixoto, Margarida F. Jacome:
Algorithm and architecture-level design space exploration using hierarchical data flows. ASAP 1997: 272-282 - 1996
- [j1]Margarida F. Jacome, Stephen W. Director:
A formal basis for design process planning and management. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(10): 1197-1210 (1996) - 1994
- [c3]Margarida F. Jacome, Stephen W. Director:
A formal basis for design process planning and management. ICCAD 1994: 516-521 - 1992
- [c2]Margarida F. Jacome, Stephen W. Director:
Design Process Management for CAD Frameworks. DAC 1992: 500-505 - [c1]Juan Carlos López, Margarida F. Jacome, Stephen W. Director:
Design assistance for CAD frameworks. EURO-DAC 1992: 494-499
Coauthor Index
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