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2020 – today
- 2023
[c5]Kangan Wang, Junchen Wu, Siyu Wu, Yixian Qu, Derui Kong, Weimin Wu:
Hybrid DC Solid-State Transformer with Bidirectional Asymmetric Power Flow for Low-Penetration Renewable Energy Systems. IECON 2023: 1-6- [c4]Kangan Wang, Jianglin Xu, Siyu Wu, Derui Kong, Yixian Qu, Weimin Wu:
Topology and Operation Analysis of Hybrid DC/DC Converters with Bidirectional Asymmetric Power Flow. IECON 2023: 1-6 - 2020
- [j6]Derui Kong
, Ian Galton:
MSE Analysis of a Multi-Loop LMS Pseudo-Random Noise Canceler for Mixed-Signal Circuit Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 3084-3098 (2020)
2010 – 2019
- 2019
- [j5]Derui Kong, Kevin Rivas-Rivera, Ian Galton:
A 600-MS/s DAC With Over 87-dB SFDR and 77-dB Peak SNDR Enabled by Adaptive Cancellation of Static and Dynamic Mismatch Error. IEEE J. Solid State Circuits 54(8): 2219-2229 (2019) - [j4]Derui Kong, Ian Galton:
Subsampling Mismatch Noise Cancellation for High-Speed Continuous-Time DACs. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(8): 2843-2853 (2019) - 2018
- [j3]Derui Kong, Ian Galton:
Adaptive Cancellation of Static and Dynamic Mismatch Error in Continuous-Time DACs. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(2): 421-433 (2018) - 2017
- [j2]Derui Kong, Dongwon Seo, Sang Min Lee:
Analysis and Reduction of Nonidealities in Stacked-Transistor Current Sources. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 774-778 (2017) - [j1]Sang Min Lee, Namsoo Kim, Derui Kong, Dongwon Seo:
A DAC With an Impedance Attenuator and Distortion Analysis Using Volterra Series. IEEE Trans. Very Large Scale Integr. Syst. 25(10): 2929-2938 (2017) - 2015
- [c3]Derui Kong, Sang Min Lee, Shahin Mehdizad Taleie, Michael Joseph McGowan, Dongwon Seo:
A linear transconductance amplifier with differential-mode bandwidth extension and common-mode compensation. CICC 2015: 1-4 - [c2]Sang Min Lee, Dongwon Seo, Shahin Mehdizad Taleie, Derui Kong, Michael Joseph McGowan, Tongyu Song, Ganesh R. Saripalli, Jenny Kuo, Seyfi S. Bazarjani:
A 14b 750MS/s DAC in 20nm CMOS with <-168dBm/Hz noise floor beyond Nyquist and 79dBc SFDR utilizing a low glitch-noise hybrid R-2R architecture. VLSIC 2015: 164-
2000 – 2009
- 2006
- [c1]Yunfeng Peng, Derui Kong, Feng Zhou:
A Low-Voltage Sampling Switch with Improved Linearity. CCECE 2006: 1706-1709
Coauthor Index
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