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Animesh Datta
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2020 – today
- 2022
- [c16]Tianrui Tan, Kwan Kit Lee, Amit Ashok, Animesh Datta, Boulat A. Bash:
Robust Adaptive Quantum-Limited Super-Resolution Imaging. IEEECONF 2022: 504-508
2010 – 2019
- 2018
- [j6]David E. Simmons, Justin P. Coon, Animesh Datta:
The von Neumann Theil index: characterizing graph centralization using the von Neumann index. J. Complex Networks 6(6): 859-876 (2018) - 2017
- [c15]David E. Simmons, Justin P. Coon, Animesh Datta:
Quantum Enhanced Classical Sensor Networks. GLOBECOM Workshops 2017: 1-6 - [c14]Boulat A. Bash
, Christos N. Gagatsos, Animesh Datta, Saikat Guha:
Fundamental limits of quantum-secure covert optical sensing. ISIT 2017: 3210-3214 - [i5]David E. Simmons, Justin P. Coon, Animesh Datta:
Symmetric Laplacians, Quantum Density Matrices and their Von-Neumann Entropy. CoRR abs/1703.01142 (2017) - [i4]David E. Simmons, Justin P. Coon, Animesh Datta:
The Quantum Theil Index: Characterizing Graph Centralization using von Neumann Entropy. CoRR abs/1707.07906 (2017) - [i3]David E. Simmons, Justin P. Coon, Animesh Datta:
Quantum Enhanced Classical Sensor Networks. CoRR abs/1707.09166 (2017) - 2014
- [c13]Theodoros Kapourniotis
, Elham Kashefi, Animesh Datta:
Blindness and Verification of Quantum Computation with One Pure Qubit. TQC 2014: 176-204 - 2013
- [c12]Animesh Datta, Mohamed H. Abu-Rahma, Sachin Dileep Dasnurkar, Hadi Rasouli, Sean Tamjidi, Ming Cai, Samit Sengupta, P. R. Chidambaram, Raghavan Thirumala, Nikhil Kulkarni, Prasanna Seeram, Prasad Bhadri, Prayag Patel, Sei Seung Yoon, Esin Terzioglu:
Analysis, modeling and silicon correlation of low-voltage flop data retention in 28nm process technology. ISQED 2013: 580-584 - [c11]Sachin Dileep Dasnurkar, Animesh Datta, Mohamed H. Abu-Rahma, Hieu Nguyen, Martin Villafana, Hadi Rasouli, Sean Tamjidi, Ming Cai, Samit Sengupta, P. R. Chidambaram, Raghavan Thirumala, Nikhil Kulkarni, Prasanna Seeram, Prasad Bhadri, Prayag Patel, Sei Seung Yoon, Esin Terzioglu:
Experiments and analysis to characterize logic state retention limitations in 28nm process node. VTS 2013: 1-6 - 2011
- [c10]Koninika Pal, Prajna Devi Upadhyay
, Animesh Datta:
A Petri Net Based Model for Multipoint Multistream Synchronization in Multimedia Conferencing. SUComS 2011: 64-73 - [c9]Vaibhav Madhok, Animesh Datta:
Quantum Discord in Quantum Information Theory - From Strong Subadditivity to the Mother Protocol. TQC 2011: 188-197 - 2010
- [c8]Shrutilipi Bhattacharjee, Imon Banerjee, Animesh Datta:
An Ontology Based Framework for Domain Analysis of Interactive System. IC3 (1) 2010: 391-402 - [c7]Martin Saint-Laurent, Animesh Datta:
A low-power clock gating cell optimized for low-voltage operation in a 45-nm technology. ISLPED 2010: 159-164 - [c6]Animesh Datta, Imon Banerjee, Shrutilipi Bhattacharjee, Ranjan Dasgupta, Swapan Bhattacharya:
Framework for Domain Analysis of Teleteaching System: A Semiformal Approach. Software Engineering Research and Practice 2010: 92-98 - [i2]Vaibhav Madhok, Animesh Datta:
Interpreting quantum discord through quantum state merging. CoRR abs/1008.4135 (2010)
2000 – 2009
- 2008
- [j5]Animesh Datta, Swarup Bhunia
, Jung Hwan Choi, Saibal Mukhopadhyay, Kaushik Roy:
Profit Aware Circuit Design Under Process Variations Considering Speed Binning. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 806-815 (2008) - 2007
- [j4]Animesh Datta, Ashish Goel, R. T. Cakici, Hamid Mahmoodi
, Dheepa Lekshmanan, Kaushik Roy:
Modeling and Circuit Synthesis for Independently Controlled Double Gate FinFET Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(11): 1957-1966 (2007) - [i1]Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Nilanjan Banerjee, Kaushik Roy:
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies. CoRR abs/0710.4663 (2007) - 2006
- [j3]Animesh Datta, Swarup Bhunia
, Saibal Mukhopadhyay, Kaushik Roy:
Delay Modeling and Statistical Design of Pipelined Circuit Under Process Variation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11): 2427-2436 (2006) - [c5]Animesh Datta, Swarup Bhunia
, Jung Hwan Choi, Saibal Mukhopadhyay, Kaushik Roy:
Speed binning aware design methodology to improve profit under parameter variations. ASP-DAC 2006: 712-717 - 2005
- [j2]Swarup Bhunia
, Animesh Datta, Nilanjan Banerjee, Kaushik Roy:
GAARP: A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks. IEEE Trans. Computers 54(6): 752-766 (2005) - [j1]Amit Agarwal, Bipul Chandra Paul, Hamid Mahmoodi-Meimand
, Animesh Datta, Kaushik Roy:
A process-tolerant cache architecture for improved yield in nanoscale technologies. IEEE Trans. Very Large Scale Integr. Syst. 13(1): 27-38 (2005) - [c4]Animesh Datta, Swarup Bhunia
, Saibal Mukhopadhyay, Kaushik Roy:
A Statistical Approach to Area-Constrained Yield Enhancement for Pipelined Circuits under Parameter Variations. Asian Test Symposium 2005: 170-175 - [c3]Animesh Datta, Swarup Bhunia
, Saibal Mukhopadhyay, Nilanjan Banerjee, Kaushik Roy:
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies. DATE 2005: 926-931 - [c2]Animesh Datta, Saibal Mukhopadhyay, Swarup Bhunia
, Kaushik Roy:
Yield Prediction of High Performance Pipelined Circuit with Respect to Delay Failures in Sub-100nm Technology. IOLTS 2005: 275-280 - [c1]Animesh Datta, Swarup Bhunia
, Nilanjan Banerjee, Kaushik Roy:
A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks. ISQED 2005: 358-363
Coauthor Index
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