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ORCIDFatemeh Aezinia
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2010 – 2019
- 2016
[j4]Fatemeh Aezinia, Behraad Bahreyni:
Low-power, parasitic-insensitive interface circuit for capacitive microsensors. IET Circuits Devices Syst. 10(2): 104-110 (2016)- 2013
- [j3]Fatemeh Aezinia, Behraad Bahreyni:
An Interface Circuit With Wide Dynamic Range for Differential Capacitive Sensing Applications. IEEE Trans. Circuits Syst. II Express Briefs 60-II(11): 766-770 (2013) - [c8]Fatemeh Aezinia, Behraad Bahreyni:
A low-power, low-cost switched-capacitor circuit for differential capacitive microsensors. CCECE 2013: 1-4 - [c7]Fatemeh Aezinia, Behraad Bahreyni:
A readout circuit with wide dynamic range for differential capacitive sensing applications. CCECE 2013: 1-4 - [c6]Fatemeh Aezinia, Behraad Bahreyni:
A low power CMOS integrated circuit for differential capacitive measurement. MWSCAS 2013: 189-192 - 2012
- [j2]Fatemeh Aezinia, Yifan Wang, Behraad Bahreyni:
Three dimensional touchless tracking of objects using integrated capacitive sensors. IEEE Trans. Consumer Electron. 58(3): 886-890 (2012) - 2010
- [c5]Fatemeh Aezinia, S. Alireza Banani, Mani Malek Esmaeili:
Fine localization of photons on the pixellated detectors based on the analytical model. CCECE 2010: 1-4
2000 – 2009
- 2007
- [j1]Fatemeh Aezinia, Ali Afzali-Kusha:
Low power high performance level converter for dual supply voltage systems. IEICE Electron. Express 4(9): 306-311 (2007) - 2006
- [c4]Fatemeh Aezinia, S. Najafzadeh, Ali Afzali-Kusha:
Novel High Speed and Low Power Single and Double Edge-Triggered Flip-Flops. APCCAS 2006: 1383-1386 - [c3]Fatemeh Aezinia, Behjat Forouzandeh:
A Novel Low Power NOR gate in SOI CMOS Technology. APCCAS 2006: 1403-1405 - [c2]Fatemeh Aezinia, Ali Afzali-Kusha, Caro Lucas:
Optimizing High Speed Flip-Flop Using Genetic Algorithm. APCCAS 2006: 1787-1790 - [c1]Bahman Kheradmand Boroujeni, Fatemeh Aezinia, Ali Afzali-Kusha:
High performance circuit techniques for dynamic OR gates. ISCAS 2006
Coauthor Index
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