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ORCIDHans Hegt
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- affiliation: Eindhoven University of Technology, Department of Electrical Engineering, The Netherlands
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2010 – 2019
- 2017
[c39]Chenming Zhang, Lucien J. Breems, Georgi I. Radulov, Muhammed Bolatkale, Qilong Liu, Hans Hegt, Arthur H. M. van Roermund:
Current-mode multi-path excess loop delay compensation for GHz sampling CT ΣΔ ADCs. ISCAS 2017: 1-4- 2016
- [c38]Jingjing Hu, Johannes A. Hegt, Arthur H. M. van Roermund, Sotir F. Ouzounov:
Higher-order DWA in bandpass delta-sigma modulators and its implementation. ISCAS 2016: 73-76 - [c37]Chenming Zhang, Lucien J. Breems, Georgi I. Radulov, Muhammed Bolatkale, Hans Hegt, Arthur H. M. van Roermund:
A digital calibration technique for wide-band CT MASH ΣΔ ADCs with relaxed filter requirements. ISCAS 2016: 1486-1489 - 2015
- [j13]Ketan J. Pol, Sotir Ouzounov, Hans Hegt, Arthur H. M. van Roermund:
A Background Calibration Technique Based on Limit Cycles for Reconfigurable Sigma Delta Modulators. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(4): 584-597 (2015) - [c36]Ketan J. Pol, Hans Hegt, Arthur H. M. van Roermund, Sotir Ouzounov:
A femto-ampere sensitive direct-interface current-input sigma delta ADC for amperometric bio-sensor signal acquisition. BioCAS 2015: 1-4 - [c35]Jingjing Hu, Hans Hegt, Arthur H. M. van Roermund, Sotir Ouzounov:
Bitstream switching rate based calibration of delta-sigma modulators. ISCAS 2015: 2293-2296 - [c34]Jingjing Hu, Johannes A. Hegt, Arthur H. M. van Roermund, Sotir F. Ouzounov:
Automatic filter calibration for bandpass delta-sigma modulators. MWSCAS 2015: 1-4 - 2014
- [c33]Ketan J. Pol, Hans Hegt, Arthur H. M. van Roermund, Sotir Ouzounov:
Limit cycle counting based smart background calibration of continuous time sigma delta ADCs. ISCAS 2014: 722-725 - 2013
- [c32]Yu Lin, Kostas Doris, Erwin Janssen, Athon Zanikopoulos, Alessandro Murroni, Gerard van der Weide, Hans Hegt, Arthur H. M. van Roermund:
An 11b 1GS/s ADC with parallel sampling architecture to enhance SNDR for multi-carrier signals. ESSCIRC 2013: 121-124 - [c31]Ketan J. Pol, Hans Hegt, Sotir Ouzounov:
Sigma delta feedback DAC architectures for high accuracy and extremely low charge transfer. ISCAS 2013: 1813-1816 - 2012
- [j12]Yu Lin, Kostas Doris, Hans Hegt, Arthur H. M. van Roermund:
An 11b Pipeline ADC With Parallel-Sampling Technique for Converting Multi-Carrier Signals. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(5): 906-914 (2012) - [c30]Yu Lin, Kostas Doris, Hans Hegt, Arthur H. M. van Roermund:
A dynamic latched comparator for low supply voltages down to 0.45 V in 65-nm CMOS. ISCAS 2012: 2737-2740 - 2011
- [j11]Yongjian Tang, Joost Briaire, Kostas Doris, Robert H. M. van Veldhoven, Pieter C. W. van Beek, Hans Hegt, Arthur H. M. van Roermund:
A 14 bit 200 MS/s DAC With SFDR > 78 dBc, IM3 < - 83 dBc and NSD < - 163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping. IEEE J. Solid State Circuits 46(6): 1371-1381 (2011) - [c29]Yu Lin, Kostas Doris, Hans Hegt, Arthur H. M. van Roermund:
An 11b pipeline ADC with dual sampling technique for converting multi-carrier signals. ISCAS 2011: 257-260 - [c28]Elbert Bechthum, Yongjian Tang, Hans Hegt, Arthur H. M. van Roermund:
Timing error measurement for highly linear wideband Digital to Analog Converters. ISCAS 2011: 2019-2022
2000 – 2009
- 2009
- [j10]Arthur H. M. van Roermund, Peter G. M. Baltus, André van Bezooijen, Johannes A. (Hans) Hegt, Emanuele Lopelli, Reza Mahmoudi, Georgi I. Radulov, Maja Vidojkovic:
Smart Front-Ends, from Vision to Design. IEICE Trans. Electron. 92-C(6): 747-756 (2009) - [j9]Pieter J. A. Harpe, Johannes A. Hegt, Arthur H. M. van Roermund:
Analog calibration of channel mismatches in time-interleaved ADCs. Int. J. Circuit Theory Appl. 37(2): 301-318 (2009) - 2008
- [c27]Georgi I. Radulov, Patrick J. Quinn, Hans Hegt, Arthur H. M. van Roermund:
A flexible 12-bit self-calibrated quad-core current-steering DAC. APCCAS 2008: 25-28 - [c26]Yongjian Tang, Hans Hegt, Arthur H. M. van Roermund:
Predictive timing error calibration technique for RF current-steering DACs. ISCAS 2008: 228-231 - 2007
- [j8]Sotir Ouzounov, Engel Roza
, Hans Hegt, Gerard van der Weide, Arthur H. M. van Roermund:
Design of MOS transconductors with low noise and low harmonic distortion for minimum current consumption. Integr. 40(3): 365-379 (2007) - [j7]Georgi I. Radulov, Markus Heydenreich, Remco van der Hofstad, Johannes A. Hegt, Arthur H. M. van Roermund:
Brownian-Bridge-Based Statistical Analysis of the DAC INL Caused by Current Mismatch. IEEE Trans. Circuits Syst. II Express Briefs 54-II(2): 146-150 (2007) - [c25]Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Analog calibration of channel mismatches in time-interleaved ADCs. ECCTD 2007: 236-239 - [c24]Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Analysis of Open Loop Track-and-Hold Circuits. ICECS 2007: 1236-1239 - [c23]Yongjian Tang, Hans Hegt, Arthur H. M. van Roermund, Konstantinos Doris, Joost Briaire:
Statistical Analysis of Mapping Technique for Timing Error Correction in Current-Steering DACs. ISCAS 2007: 1225-1228 - [c22]Georgi I. Radulov, Patrick J. Quinn, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Parallel current-steering D/A Converters for Flexibility and Smartness. ISCAS 2007: 1465-1468 - [c21]Pieter Harpe, Athon Zanikopoulos, Hans Hegt, Arthur H. M. van Roermund:
Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs. ISCAS 2007: 1951-1954 - [c20]Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Design of the Basic Building Block of a High-Speed Flexible and Modular Pipelined ADC. ISCAS 2007: 3876-3879 - 2006
- [j6]Sotir Ouzounov, Engel Roza, Johannes A. Hegt, Gerard van der Weide, Arthur H. M. van Roermund:
Analysis and design of high-performance asynchronous sigma-delta Modulators with a binary quantizer. IEEE J. Solid State Circuits 41(3): 588-596 (2006) - [j5]Sotir Ouzounov, Hans Hegt, Arthur H. M. van Roermund:
Sigma-delta modulators operating at a limit cycle. IEEE Trans. Circuits Syst. II Express Briefs 53-II(5): 399-403 (2006) - [c19]Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Power Optimization for Pipelined ADCs with Open-Loop Residue Amplifiers. ICECS 2006: 132-135 - [c18]Pieter Harpe, Athon Zanikopoulos, Hans Hegt, Arthur H. M. van Roermund:
Digital post-correction of front-end track-and-hold circuits in ADCs. ISCAS 2006 - [c17]Georgi I. Radulov, Patrick J. Quinn, Pieter C. W. van Beek, Johannes A. Hegt, Arthur H. M. van Roermund:
A binary-to-thermometer decoder with built-in redundancy for improved DAC yield. ISCAS 2006 - [c16]Yongjian Tang, Hans Hegt, Arthur H. M. van Roermund:
DDL-based calibration techniques for timing errors in current-steering DACs. ISCAS 2006 - 2005
- [j4]Sotir Ouzounov, Engel Roza, Johannes A. (Hans) Hegt, Gerard van der Weide, Arthur H. M. van Roermund:
A CMOS V-I converter with 75-dB SFDR and 360-μW power consumption. IEEE J. Solid State Circuits 40(7): 1527-1532 (2005) - [c15]Georgi I. Radulov, Patrick J. Quinn, Hans Hegt, Arthur H. M. van Roermund:
An on-chip self-calibration method for current mismatch in D/A converters. ESSCIRC 2005: 169-172 - [c14]Georgi I. Radulov, Patrick J. Quinn, Johannes A. Hegt, Arthur H. M. van Roermund:
A start-up calibration method for generic current-steering D/A converters with optimal area solution. ISCAS (1) 2005: 788-791 - [c13]Arthur H. M. van Roermund, Hans Hegt, Pieter Harpe, Georgi I. Radulov, Athon Zanikopoulos, Konstantinos Doris, Patrick J. Quinn:
Smart AD and DA converters. ISCAS (4) 2005: 4062-4065 - [c12]Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
A flexible ADC approach for mixed-signal SoC platforms. ISCAS (5) 2005: 4839-4842 - 2004
- [c11]Sotir Ouzounov, Engel Roza, Hans Hegt, Gerard van der Weide, Arthur H. M. van Roermund:
Design of high-performance asynchronous sigma delta modulators with a binary quantizer with hysteresis. CICC 2004: 181-184 - [c10]Sotir Ouzounov, Engel Roza, Hans Hegt, Gerard van der Weide, Arthur H. M. van Roermund:
CMOS V-I converter with 75dB SFDR and 360μW power consumption. ESSCIRC 2004: 235-238 - 2002
- [j3]Robert H. M. van Veldhoven, Brian J. Minnis, Johannes A. (Hans) Hegt, Arthur H. M. van Roermund:
A 3.3-mW ΣΔ modulator for UMTS in 0.18-μm CMOS with 70-dB dynamic range in 2-MHz bandwidth. IEEE J. Solid State Circuits 37(12): 1645-1652 (2002) - 2001
- [c9]Valeri M. Mladenov, Hans Hegt, Arthur H. M. van Roermund:
On the stability of high order Sigma-Delta modulators. ICECS 2001: 1383-1386 - [c8]Valeri M. Mladenov, Hans Hegt, Arthur H. M. van Roermund:
Terminal dynamics approach to cellular neural networks. ISCAS (3) 2001: 97-100
1990 – 1999
- 1999
- [c7]Nadeem A. Khan, Hans Hegt:
Recognition of Real-Life Character Samples using a Structural Variation and Degradation Model. ICDAR 1999: 225-228 - 1998
- [c6]Nadeem A. Khan, Hans Hegt:
A flexible and robust matching scheme for character recognition to cope with variations in spatial interrelation among structural features. SMC 1998: 4166-4171 - [c5]Nadeem A. Khan, Hans Hegt, Ignacio C. Allue:
A variation and distortion tolerant structural pre-classifier for hierarchical character recognition. SMC 1998: 4264-4267 - [c4]Hans Hegt, Ron J. de la Haye, Nadeem A. Khan:
A high performance license plate recognition system. SMC 1998: 4357-4362 - [c3]Nadeem A. Khan, Hans Hegt:
On Structural Modelling for Omnifont and Handwritten Character Recognition. SSPR/SPR 1998: 532-539 - 1996
- [j2]Domine M. W. Leenaerts, G. H. M. Joordens, Johannes A. Hegt:
A 3.3 V 625 kHz switched-current multiplier. IEEE J. Solid State Circuits 31(9): 1340-1343 (1996) - [c2]Domine Leenaerts, G. H. M. Joordens, Johannes A. Hegt:
A low power high performance switched-current multiplier. ISLPED 1996: 277-280 - 1995
- [c1]G. H. M. Joordens, Johannes A. Hegt, Domine Leenaerts:
A High Performance Low Voltage Switched-Current Multiplier. ISCAS 1995: 1856-1859 - 1991
- [j1]Domine M. W. Leenaerts, Johannes A. Hegt:
Finding all solutions of piecewise linear functions and application to circuit design. Int. J. Circuit Theory Appl. 19(2): 107-123 (1991)
Coauthor Index
aka: Sotir F. Ouzounov
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