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Jin He 0003
Person information
- affiliation: Peking University, Shenzhen SOC Key Laboratory, China
Other persons with the same name
- Jin He — disambiguation page
- Jin He 0001 — Shanghai Jiaotong University, School of Electronic Information and Electrical Engineering, China (and 3 more)
- Jin He 0002 — Wuhan University, School of Physics and Technology, China (and 1 more)
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2020 – today
- 2023
- [j15]Laixiang Qin, Chunlai Li, Yiqun Wei, Guoqing Hu, Jingbiao Chen, Yi Li, Caixia Du, Zhangwei Xu, Xiumei Wang, Jin He:
Recent Developments in Negative Capacitance Gate-All-Around Field Effect Transistors: A Review. IEEE Access 11: 14028-14042 (2023) - 2020
- [j14]Xiao-Meng Wang, Xiao-Kun Bi, Shao-Hua Guo, Jin He, Chun-Lai Li, Jingjing Liu, Guo-Qing Hu, Guang-Jin Ma, Zhongting Xu:
Synthesis Design of Equal-Ripple and Quasi-Elliptic Wideband BPFs With Independently Reconfigurable Lower Passband Edge. IEEE Access 8: 76856-76866 (2020)
2010 – 2019
- 2019
- [c12]Jingjing Liu, Riqing Chen, Yuan Ren, Zhongting Xu, Guoqing Hu, Jun Pan, Chunlai Li, Jin He:
A Passive Optical Transmitter Using LC Switches for IoT Smart Dusts. CCECE 2019: 1-4 - 2017
- [j13]Khawar Sarfraz, Jin He, Mansun Chan:
A 140-mV Variation-Tolerant Deep Sub-Threshold SRAM in 65-nm CMOS. IEEE J. Solid State Circuits 52(8): 2215-2220 (2017) - 2013
- [j12]Chenyue Ma, Hans Jürgen Mattausch, Masataka Miyake, Takahiro Iizuka, Kazuya Matsuzawa, Seiichiro Yamaguchi, Teruhiko Hoshida, Akinori Kinoshita, Takahiko Arakawa, Jin He, Mitiko Miura-Mattausch:
Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions. IEICE Trans. Electron. 96-C(10): 1339-1347 (2013) - 2012
- [j11]Jiale Huang, Minhao Zhu, Shengqi Yang, Pallav Gupta, Wei Zhang, Steven M. Rubin, Gilda Garretón, Jin He:
A physical design tool for carbon nanotube field-effect transistor circuits. ACM J. Emerg. Technol. Comput. Syst. 8(3): 25:1-25:20 (2012) - [c11]Hailang Liang, Jin He, Cheng Wang, Xiaoan Zhu, Mansun Chan:
A MATLAB program for Volterra distortion analysis in CMOS switched source follower. APCCAS 2012: 108-111 - 2011
- [j10]Yi Chen, Yong Ma, Zheng Lu, Lixia Qiu, Jin He:
Terahertz spectroscopic uncertainty analysis for explosive mixture components determination using multi-objective micro-genetic algorithm. Adv. Eng. Softw. 42(9): 649-659 (2011) - [j9]Chenyue Ma, Lining Zhang, Chenfei Zhang, Xiufang Zhang, Jin He, Xing Zhang:
A physical based model to predict performance degradation of FinFET accounting for interface state distribution effect due to hot carrier injection. Microelectron. Reliab. 51(2): 337-341 (2011) - [c10]Zhiyu Xu, Xinnan Lin, Hao Zhuang, Bo Jiang, Haijun Lou, Jin He:
A new nonlinear parameterized model order reduction technique combining the interpolation method and Proper Orthogonal Decomposition. ASICON 2011: 886-889 - 2010
- [j8]Wing Yan Leung, Tsz Yin Man, Dongwei Zhang, Jin He, Mansun Chan:
A High Power Switch-Mode LED Driver with an Efficient Current Sensing Scheme. J. Low Power Electron. 6(1): 133-140 (2010) - [j7]Lining Zhang, Jian Zhang, Yan Song, Xinnan Lin, Jin He, Mansun Chan:
Charge-based model for symmetric double-gate MOSFETs with inclusion of channel doping effect. Microelectron. Reliab. 50(8): 1062-1070 (2010) - [j6]Chenyue Ma, Hao Wang, Chenfei Zhang, Xiufang Zhang, Jin He, Xing Zhang:
Temperature dependence of the interface state distribution due to hot carrier effect in FinFET device. Microelectron. Reliab. 50(8): 1077-1080 (2010)
2000 – 2009
- 2009
- [j5]Wei Bian, Jin He, Lining Zhang, Jian Zhang, Mansun Chan:
Sub-threshold behavior of long channel undoped cylindrical surrounding-gate MOSFETs. Microelectron. Reliab. 49(8): 897-903 (2009) - [c9]Chenyue Ma, Bo Li, Lining Zhang, Jin He, Xing Zhang, Xinnan Lin, Mansun Chan:
A unified FinFET reliability model including high K gate stack dynamic threshold voltage, hot carrier injection, and negative bias temperature instability. ISQED 2009: 7-12 - [c8]Lining Zhang, Jin He, Jian Zhang, Feng Liu, Yue Fu, Yan Song, Xing Zhang:
An analytic model for Ge/Si core/shell nanowire MOSFETs considering drift-diffusion and ballistic transport. ISQED 2009: 582-587 - 2008
- [c7]Feng Liu, Jin He, Yue Fu, Jinhua Hu, Wei Bian, Yan Song, Xing Zhang, Mansun Chan:
Generic Carrier-Based Core Model for Four-Terminal Double-Gate MOSFET Valid for Symmetric, Asymmetric, SOI, and Independent Gate Operation Modes. ISQED 2008: 271-276 - [c6]Yue Fu, Jin He, Feng Liu, Jie Feng, Chenyue Ma, Lining Zhang:
Study on the Si-Ge Nanowire MOSFETs with the Core-Shell Structure. ISQED 2008: 531-536 - 2006
- [c5]Jin He, Xing Zhang, Ganggang Zhang, Mansun Chan, Yangyuan Wang:
A Complete Carrier-Based Non-Charge-Sheet Analytic Theory for Nano-Scale Undoped Surrounding-Gate MOSFETs. ISQED 2006: 115-120 - [c4]Jin He, Xing Zhang, Ganggang Zhang, Yangyuan Wang:
A Carrier-Based Analytic Model for Undoped (Lightly Doped) Ultra-Thin-Body Silicon-on-Insulator (UTB-SOI) MOSFETs. ISQED 2006: 127-132 - 2005
- [c3]Jin He, Jane Xi, Mansun Chan, Hui Wan, Mohan V. Dunga, Babak Heydari, Ali M. Niknejad, Chenming Hu:
Charge-Based Core and the Model Architecture of BSIM5. ISQED 2005: 96-101 - 2004
- [c2]Xuemei Xi, Jin He, Mohan V. Dunga, Chung-Hsun Lin, Babak Heydari, Hui Wan, Mansun Chan, Ali M. Niknejad, Chenming Hu:
The next generation BSIM for sub-100nm mixed-signal circuit simulation. CICC 2004: 13-16 - [c1]Jin He, Xuemei Xi, Mansun Chan, Chung-Hsun Lin, Ali M. Niknejad, Chenming Hu:
A Non-Charge-Sheet Based Analytical Model of Undoped Symmetric Double-Gate MOSFETs Using SPP Approach. ISQED 2004: 45-50 - 2003
- [j4]Mansun Chan, Xuemei Xi, Jin He, Kanyu M. Cao, Mohan V. Dunga, Ali M. Niknejad, Ping K. Ko, Chenming Hu:
Practical compact modeling approaches and options for sub-0.1 mum CMOS technologies. Microelectron. Reliab. 43(3): 399-404 (2003) - [j3]Ru Huang, Jinyan Wang, Jin He, Min Yu, Xing Zhang, Yangyuan Wang:
Hot carrier degradation behavior in SOI dynamic-threshold-voltage nMOSFET's (n-DTMOSFET) measured by gated-diode configuration. Microelectron. Reliab. 43(5): 707-711 (2003) - 2002
- [j2]Jin He, Xing Zhang, Ru Huang, Yangyuan Wang:
Application of forward gated-diode R-G current method in extracting F-N stress-induced interface traps in SOI NMOSFETs. Microelectron. Reliab. 42(1): 145-148 (2002) - 2001
- [j1]Jin He, Xing Zhang, Ru Huang, Yangyuan Wang:
Extraction of the lateral distribution of interface traps in MOSFETs by a novel combined gated-diode technique. Microelectron. Reliab. 41(12): 1953-1957 (2001)
Coauthor Index
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