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"A Test Methodology for Interconnect Structures of LUT-based FPGAs."
Hiroyuki Michinishi et al. (1996)
- Hiroyuki Michinishi, Tokumi Yokohira, Takuji Okamoto, Tomoo Inoue, Hideo Fujiwara:
A Test Methodology for Interconnect Structures of LUT-based FPGAs. Asian Test Symposium 1996: 68-74
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