"Layout-aware sizing of analog ICs using floorplan & routing estimates ..."

Nuno Lourenço, Ricardo Martins, Nuno Horta (2015)

> Home

Details and statistics

DOI: —

access: closed

type: Conference or Workshop Paper

metadata version: 2021-08-09

- view
  - electronic edition @ acm.org
  - electronic edition @ ieee.org
- export record
  dblp key:
  - conf/date/LourencoMH15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/date/LourencoMH15
Nuno Lourenço, Ricardo Martins, Nuno Horta:
Layout-aware sizing of analog ICs using floorplan & routing estimates for parasitic extraction. DATE 2015: 1156-1161

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.