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"Making area-performance tradeoffs at the high level using the AccelFPGA ..."

Prithviraj Banerjee et al. (2003)

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DOI: 10.1145/611817.611854

access: closed

type: Conference or Workshop Paper

metadata version: 2021-03-09

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  dblp key:
  - conf/fpga/BanerjeeSUHNKBPTA03
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  - https://dblp.org/rec/conf/fpga/BanerjeeSUHNKBPTA03
Prithviraj Banerjee, Vikram Saxena, Juan Ramon Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, Robert Anderson:
Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs. FPGA 2003: 237

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