"Automatic and Semi-Automatic Verification of Switch-Level Circuits with ..."

Masahiro Fujita, Yusuke Matsunaga, Takeo Kakuda (1990)

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DOI: 10.1109/ICCAD.1990.129834

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Masahiro Fujita, Yusuke Matsunaga, Takeo Kakuda:
Automatic and Semi-Automatic Verification of Switch-Level Circuits with Temporal Logic and Binary Decision Diagrams. ICCAD 1990: 38-41

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