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"Gate-level simulation of CMOS circuits using the IDDM model."
Manuel J. Bellido et al. (2001)
- Manuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia-Barrero:
Gate-level simulation of CMOS circuits using the IDDM model. ISCAS (5) 2001: 483-486
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