"A Back-Gate-Input Clocked Comparator with Improved Speed and Reduced Noise ..."

Haoyu Zhuang et al. (2021)

> Home

Details and statistics

DOI: 10.1109/ISCAS51556.2021.9401638

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/ZhuangTPL21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/ZhuangTPL21
Haoyu Zhuang, He Tang, Xizhu Peng, Yuefeng Li:
A Back-Gate-Input Clocked Comparator with Improved Speed and Reduced Noise in 22-nm SOI CMOS. ISCAS 2021: 1-5

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.