"An energy efficient cache design using spin torque transfer (STT) RAM."

Mitchelle Rasquinha et al. (2010)

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DOI: 10.1145/1840845.1840931

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/islped/RasquinhaCCMY10
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Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatterjee, Saibal Mukhopadhyay, Sudhakar Yalamanchili:
An energy efficient cache design using spin torque transfer (STT) RAM. ISLPED 2010: 389-394

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