Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Exploring the high-throughput and low-delay hardware design of SM4 on FPGA."

Yixiao Chen et al. (2022)

> Home

Details and statistics

DOI: 10.1109/ISOCC56007.2022.10031393

access: closed

type: Conference or Workshop Paper

metadata version: 2023-05-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isocc/ChenSCCYLLLY22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isocc/ChenSCCYLLLY22
Yixiao Chen, Jinfeng Song, Shuai Chen, Yuan Cao, Jing Ye, Huawei Li, Xiaowei Li, Xin Lou, Enyi Yao:
Exploring the high-throughput and low-delay hardware design of SM4 on FPGA. ISOCC 2022: 211-212

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.