Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension ..."

Masanori Hashimoto et al. (2020)

> Home

Details and statistics

DOI: 10.1109/ISSCC19947.2020.9062908

access: closed

type: Conference or Workshop Paper

metadata version: 2023-11-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/HashimotoBBTSYD20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/HashimotoBBTSYD20
Masanori Hashimoto, Xu Bai, Naoki Banno, Munehiro Tada, Toshitsugu Sakamoto, Jaehoon Yu, Ryutaro Doi, Yusuke Araki, Hidetoshi Onodera, Takashi Imagawa, Hiroyuki Ochi, Kazutoshi Wakabayashi, Yukio Mitsuyama, Tadahiko Sugibayashi:
33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for Al Applications. ISSCC 2020: 502-504

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.