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"A 450ps Access-Time SRAM Macro in 45nm SOI Featuring a Two-Stage ..."

Harold Pilo et al. (2008)

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DOI: 10.1109/ISSCC.2008.4523215

access: closed

type: Conference or Workshop Paper

metadata version: 2022-03-29

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Harold Pilo, Vaidyanathan Ramadurai, Geordie Braceras, John A. Gabric, Steve Lamphier, Yue Tan:
A 450ps Access-Time SRAM Macro in 45nm SOI Featuring a Two-Stage Sensing-Scheme and Dynamic Power Management. ISSCC 2008: 378-379

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