"BIST Plan Optimization and Independent Input Test Register Insertion for ..."

Wang Jiang Chau et al. (2002)

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type: Conference or Workshop Paper

metadata version: 2023-07-26

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  - conf/latw/ChauGSP02
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  - https://dblp.org/rec/conf/latw/ChauGSP02
Wang Jiang Chau, Jose Artur Quilici González, Marius Strum, Ricardo Pires:
BIST Plan Optimization and Independent Input Test Register Insertion for Datapath Functional Units. LATW 2002: 64-69

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